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157 条记录 (耗时 0.024 秒)

    Graphene synthesis by chemical vapor deposition
    134.
    发明授权
    Graphene synthesis by chemical vapor deposition 有权
    石墨烯化学气相沉积合成

    公开(公告)号：US08470400B2

    公开(公告)日：2013-06-25

    申请号：US12774342

    申请日：2010-05-05

    申请人： Luigi Colombo ,  Xuesong Li ,  Rodney S. Ruoff

    发明人： Luigi Colombo ,  Xuesong Li ,  Rodney S. Ruoff

    IPC分类号： C23C16/00

    CPC分类号： C23C16/26 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/186

    摘要： Processes for synthesizing graphene films. Graphene films may be synthesized by heating a metal or a dielectric on a substrate to a temperature between 400° C. and 1,400° C. The metal or dielectric is exposed to an organic compound thereby growing graphene from the organic compound on the metal or dielectric. The metal or dielectric is later cooled to room temperature. As a result of the above process, standalone graphene films may be synthesized with properties equivalent to exfoliated graphene from natural graphite that is scalable to size far greater than that available on silicon carbide, single crystal silicon substrates or from natural graphite.

    摘要翻译： 合成石墨烯薄膜的方法。 石墨烯膜可以通过将基板上的金属或电介质加热到400℃和1400℃之间的温度来合成。将金属或电介质暴露于有机化合物，从而从金属或电介质上的有机化合物生长石墨烯 。 然后将金属或电介质冷却至室温。 作为上述方法的结果，独立的石墨烯膜可以合成具有相当于天然石墨剥离的石墨烯的性质，该石墨烯的尺寸远大于在碳化硅，单晶硅衬底或天然石墨上可获得的尺寸。

    Method of Setting a Work Function of a Fully Silicided Semiconductor Device, and Related Device
    135.
    发明申请
    Method of Setting a Work Function of a Fully Silicided Semiconductor Device, and Related Device 审中-公开
    设置完全硅化半导体器件的功能的方法及相关器件

    公开(公告)号：US20100187613A1

    公开(公告)日：2010-07-29

    申请号：US12750916

    申请日：2010-03-31

    申请人： Luigi Colombo ,  Mark R. Visokay ,  James J. Chambers

    发明人： Luigi Colombo ,  Mark R. Visokay ,  James J. Chambers

    IPC分类号： H01L27/092

    CPC分类号： H01L21/823835 ,  H01L21/28079 ,  H01L21/28097 ,  H01L21/28176 ,  H01L21/28518 ,  H01L21/76819 ,  H01L21/823842

    摘要： A method of setting a work function of a fully silicided semiconductor device, and related device. At least some of the illustrative embodiments are methods comprising forming a gate stack over a semiconductor substrate (the gate stack comprising a dielectric layer, a silicide layer on the dielectric layer that defines a metal-dielectric layer interface, and a polysilicon layer on the silicide layer), depositing a metal layer over the gate stack, annealing to induce a reaction between the polysilicon layer and the metal layer, and delivering a work function-setting dopant to the metal-dielectric layer interface by way of the reaction.

    摘要翻译： 一种设置完全硅化半导体器件的功能的方法及相关器件。 示例性实施例中的至少一些是包括在半导体衬底上形成栅极堆叠的方法（栅极堆叠包括电介质层，介电层上的硅化物层，其限定金属 - 电介质层界面，以及硅化物上的多晶硅层 层），在栅极堆叠上沉积金属层，退火以引起多晶硅层和金属层之间的反应，以及通过反应将功函数赋予掺杂剂输送到金属 - 电介质层界面。

    ESTABLISHING A UNIFORMLY THIN DIELECTRIC LAYER ON GRAPHENE IN A SEMICONDUCTOR DEVICE WITHOUT AFFECTING THE PROPERTIES OF GRAPHENE
    136.
    发明申请
    ESTABLISHING A UNIFORMLY THIN DIELECTRIC LAYER ON GRAPHENE IN A SEMICONDUCTOR DEVICE WITHOUT AFFECTING THE PROPERTIES OF GRAPHENE 有权
    在不影响石墨性能的半导体器件中在石墨层上建立均匀的薄电介质层

    公开(公告)号：US20100181655A1

    公开(公告)日：2010-07-22

    申请号：US12357526

    申请日：2009-01-22

    申请人： Luigi Colombo ,  Sanjay Banerjee ,  Seyoung Kim ,  Emanuel Tutuc

    发明人： Luigi Colombo ,  Sanjay Banerjee ,  Seyoung Kim ,  Emanuel Tutuc

    IPC分类号： H01L29/00 ,  H01L21/18

    CPC分类号： H01L29/1606 ,  H01L21/28255 ,  H01L29/51 ,  H01L29/513

    摘要： A method and semiconductor device for forming a uniformly thin dielectric layer on graphene. A metal or semiconductor layer is deposited on graphene which is located on the surface of a dielectric layer or on the surface of a substrate. The metal or semiconductor layer may act as a nucleation layer for graphene. The metal or semiconductor layer may be subjected to an oxidation process. A thin dielectric layer may then be formed on the graphene layer after the metal or semiconductor layer is oxidized. As a result of synthesizing a metal-oxide layer on graphene, which acts as a nucleation layer for the gate dielectric and buffer to graphene, a uniformly thin dielectric layer may be established on graphene without affecting the underlying characteristics of graphene.

    摘要翻译： 一种用于在石墨烯上形成均匀薄的电介质层的方法和半导体器件。 金属或半导体层沉积在位于介电层表面或基板表面上的石墨烯上。 金属或半导体层可以用作石墨烯的成核层。 可以对金属或半导体层进行氧化处理。 然后可以在金属或半导体层被氧化之后在石墨烯层上形成薄的电介质层。 作为用作栅极电介质的成核层和用于石墨烯的缓冲液的石墨烯上的金属氧化物层的结果，可以在石墨烯上建立均匀的电介质层，而不影响石墨烯的潜在特性。

    Structure for dual work function metal gate electrodes by control of interface dipoles
    137.
    发明授权
    Structure for dual work function metal gate electrodes by control of interface dipoles 有权
    通过控制接口偶极子的双功能金属栅电极的结构

    公开(公告)号：US07612422B2

    公开(公告)日：2009-11-03

    申请号：US11618650

    申请日：2006-12-29

    申请人： James Joseph Chambers ,  Luigi Colombo ,  Mark Robert Visokay

    发明人： James Joseph Chambers ,  Luigi Colombo ,  Mark Robert Visokay

    IPC分类号： H01L31/119

    CPC分类号： H01L21/28079 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/495

    摘要： Exemplary embodiments provide structures for dual work function metal gate electrodes. The work function value of a metal gate electrode can be increased and/or decreased by disposing various electronegative species and/or electropositive species at the metal/dielectric interface to control interface dipoles. In an exemplary embodiment, various electronegative species can be disposed at the metal/dielectric interface to increase the work function value of the metal, which can be used for a PMOS metal gate electrode in a dual work function gated device. Various electropositive species can be disposed at the metal/dielectric interface to decrease the work function value of the metal, which can be used for an NMOS metal gate electrode in the dual work function gated device.

    摘要翻译： 示例性实施例提供了用于双功函数金属栅电极的结构。 通过在金属/电介质界面处设置各种电负性物质和/或正电性物质来控制界面偶极子，可以增加和/或降低金属栅电极的功函数值。 在示例性实施例中，各种电负性物质可以设置在金属/电介质界面处以增加金属的功函数值，其可用于双功能门控器件中的PMOS金属栅电极。 可以在金属/电介质界面处设置各种正电性物质，以降低金属的功函数值，这可以用于双功能门控器件中的NMOS金属栅电极。

    DUAL WORK FUNCTION CMOS DEVICES UTILIZING CARBIDE BASED ELECTRODES
    139.
    发明申请
    DUAL WORK FUNCTION CMOS DEVICES UTILIZING CARBIDE BASED ELECTRODES 有权
    双功能CMOS器件利用基于碳化物的电极

    公开(公告)号：US20090068828A1

    公开(公告)日：2009-03-12

    申请号：US12271080

    申请日：2008-11-14

    申请人： James Joseph Chambers ,  Luigi Colombo ,  Mark Robert Visokay

    发明人： James Joseph Chambers ,  Luigi Colombo ,  Mark Robert Visokay

    IPC分类号： H01L21/28

    CPC分类号： H01L21/823842 ,  H01L21/28088 ,  H01L29/4966

    摘要： Concurrently forming different metal gate transistors having respective work functions is disclosed. In one example, a metal carbide, which has a relatively low work function, is formed over a semiconductor substrate. Oxygen and/or nitrogen are then added to the metal carbide in a second region to establish a second work function in the second region, where the metal carbide itself establishes a first work function in a first region. One or more first metal gate transistor types are then formed in the first region and one or more second metal gate transistor types are formed in the second region.

    摘要翻译： 同时形成具有各自功函数的不同金属栅极晶体管。 在一个实例中，在半导体衬底上形成具有较低功函数的金属碳化物。 然后在第二区域中将氧和/或氮添加到金属碳化物中以在第二区域中建立第二功函数，其中金属碳化物本身在第一区域中建立第一功函数。 然后在第一区域中形成一个或多个第一金属栅晶体管类型，并且在第二区域中形成一个或多个第二金属栅极晶体管类型。