中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

1488 records (took 0.028 seconds)

    Memory Access Tracking Using a Peripheral Device
    133.
    发明申请
    Memory Access Tracking Using a Peripheral Device 有权

    公开(公告)号：US20230133439A1

    公开(公告)日：2023-05-04

    申请号：US17536141

    申请日：2021-11-29

    Applicant: Mellanox Technologies, Ltd.

    Inventor： Ran Avraham Koren ,  Ariel Shahar ,  Liran Liss ,  Gabi Liron ,  Aviad Shaul Yehezkel

    IPC: G06F12/0882 ,  G06F12/0831 ,  G06F13/16

    Abstract: A compute node includes a memory, a processor and a peripheral device. The memory is to store memory pages. The processor is to run software that accesses the memory, and to identify one or more first memory pages that are accessed by the software in the memory. The peripheral device is to directly access one or more second memory pages in the memory of the compute node using Direct Memory Access (DMA), and to notify the processor of the second memory pages that are accessed using DMA. The processor is further to maintain a data structure that tracks both (i) the first memory pages as identified by the processor and (ii) the second memory pages as notified by the peripheral device.

    Template-Based Packet Parsing
    135.
    发明申请
    Template-Based Packet Parsing 有权

    公开(公告)号：US20230127568A1

    公开(公告)日：2023-04-27

    申请号：US17508998

    申请日：2021-10-24

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Gil Levy ,  Liron Mula ,  Barak Gafni

    IPC: H04L29/06 ,  H04L29/08

    Abstract: A parsing apparatus includes a packet-type identification circuit and a parser. The packet-type identification circuit is to receive a packet to be parsed, and to identify a packet type of the packet by extracting a packet-type identifier from a defined field in the packet. The parser is to store one or more parsing templates that specify parsing of one or more respective packet types. When the packet type of the packet corresponds to a parsing template among the stored parsing templates, the parser is to parse the packet in accordance with. the stored parsing template. When the packet type of the packet does not correspond to any of the stored parsing templates, the parser is to parse the packet using an alternative parsing scheme.

    Synthesized clock synchronization between network devices
    136.
    发明授权
    Synthesized clock synchronization between network devices 有权

    公开(公告)号：US11637557B2

    公开(公告)日：2023-04-25

    申请号：US17670540

    申请日：2022-02-14

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Ran Ravid ,  Aviv Berg ,  Lavi Koch ,  Chen Gaist ,  Dotan David Levi

    IPC: H03L7/08 ,  G06F1/12 ,  H04L7/033 ,  H03L7/099

    Abstract: In one embodiment, a device includes frequency generation circuitry configured to generate a clock signal, a phase-locked loop (PLL) configured to generate a local clock based on the clock signal, a receiver configured to receive a data stream from a remote clock source and recover a remote clock from the data stream, and a controller configured to find a clock differential between the local clock and the remote clock identified as a master dock, and provide a control signal to the frequency generation circuitry responsively to the clock differential, which causes the frequency generation circuitry to adjust the clock signal so as to iteratively reduce an absolute value of the clock differential between the local clock and the remote clock identified as the master clock so that the local clock generated by the PLL is synchronized with the master clock.

Patent Agency Ranking