公开(公告)号：US5736430A

公开(公告)日：1998-04-07

申请号：US480267

申请日：1995-06-07

Applicant: James D. Seefeldt ,  Michael F. Mattes

Inventor： James D. Seefeldt ,  Michael F. Mattes

IPC: G01L9/04 ,  B81B3/00 ,  G01L9/00 ,  G01P15/08 ,  G01P15/12 ,  H01L29/84 ,  H01L21/465

CPC classification number: B81C1/00158 ,  G01L9/0042 ,  G01L9/0055 ,  G01P15/0802 ,  G01P15/123 ,  B81B2203/0315 ,  B81C2201/0115 ,  B81C2201/0178 ,  Y10S438/96

Abstract: A method of forming apparatus including a force transducer on a silicon substrate having an upper surface, the silicon substrate including a dopant of one of the n-type or the p-type, the force transducer including a cavity having spaced side walls and a diaphragm supported in the cavity, the diaphragm extending between the side walls of the cavity, comprising the steps of: a. implant in the substrate a layer of a dopant of the one of the n-type or the p-type; b. deposit an epitaxial layer on the upper surface of the substrate, the epitaxial layer including a dopant of the other of the n-type or the p-type; c. implant spaced sinkers through the epitaxial layer and into electrical connection with the layer of a dopant of the one of the n-type or the p-type, each of the sinkers including a dopant of the one of the n-type or the p-type; d. anodize the substrate to form porous silicon of the sinkers and the layer; e. oxidize the porous silicon to form silicon dioxide; and f. etch the silicon dioxide to form the cavity and diaphragm.

Abstract translation: 一种形成装置的方法，包括在具有上表面的硅衬底上的力换能器，所述硅衬底包括n型或p型中的一种的掺杂剂，所述力传感器包括具有间隔开的侧壁的空腔和隔膜 支撑在空腔中，隔膜在空腔的侧壁之间延伸，包括以下步骤：a。 在衬底中注入n型或p型之一的掺杂剂层; b。 在衬底的上表面上沉积外延层，所述外延层包括n型或p型中另一种的掺杂剂; C。 通过外延层注入间隔的沉降片并与n型或p型之一的掺杂剂层电连接，每个沉降片包括n型或p型之一的掺杂剂， 类型; d。 阳极氧化基板以形成沉降片和层的多孔硅; e。 氧化多孔硅以形成二氧化硅; 和f。 蚀刻二氧化硅以形成空腔和隔膜。

公开(公告)号：US5662814A

公开(公告)日：1997-09-02

申请号：US653977

申请日：1996-05-28

Applicant: Rinji Sugino

Inventor： Rinji Sugino

IPC: C23F1/12 ,  B81B1/00 ,  B81C1/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3213 ,  H01L29/84 ,  C03C25/06

CPC classification number: B81C1/00047 ,  B81C1/00626 ,  H01J21/105 ,  H01L21/32137 ,  B81B2203/0315 ,  B81C2201/0115

Abstract: A native oxide film is formed on the surface of a silicon substrate. The native oxide film has at least island-shaped imperfect SiO.sub.2 regions not formed with a perfect SiO.sub.2 film. Before the native oxide film is formed, a mask layer having a necessary opening is formed over the silicon substrate, according to necessity. The silicon substrate is etched in a vapor phase via the imperfect SiO.sub.2 regions of the native oxide film to form a hollow under the native oxide film at least at a partial region thereof. An upper film is formed on the native oxide film to cover and close the imperfect SiO.sub.2 regions. In this manner, a minute hollow can be formed in the silicon substrate with good controllability.

Abstract translation: 在硅衬底的表面上形成自然氧化膜。 天然氧化膜至少具有未形成完美SiO 2膜的岛状不完全SiO 2区域。 在形成自然氧化膜之前，根据需要，在硅衬底上形成具有所需开口的掩模层。 硅衬底通过自然氧化膜的不完全的SiO 2区域在气相中蚀刻，以至少在其部分区域在自然氧化膜下形成中空。 在自然氧化膜上形成上膜，以覆盖和封闭不完美的SiO 2区域。 以这种方式，可以在硅衬底中形成具有良好可控性的微小中空。

公开(公告)号：US5565084A

公开(公告)日：1996-10-15

申请号：US478732

申请日：1995-06-07

Applicant: Ho J. Lee ,  Hi D. Lee ,  Jae D. Lee ,  Jun B. Yoon ,  Chul H. Han ,  Choong K. Kim ,  Doo W. Seo

Inventor： Ho J. Lee ,  Hi D. Lee ,  Jae D. Lee ,  Jun B. Yoon ,  Chul H. Han ,  Choong K. Kim ,  Doo W. Seo

IPC: B23H3/00 ,  B41J2/16 ,  B81B3/00 ,  B81C99/00 ,  C25F3/12 ,  C25F3/30

CPC classification number: B41J2/1603 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1639 ,  B41J2/1643 ,  B81C1/00158 ,  C25F3/12 ,  B81B2203/0127 ,  B81B2203/0353 ,  B81C2201/0114 ,  B81C2201/0115

Abstract: Disclosed are electropolishing methods for etching a substrate in self alignment. A hole is formed in a substrate in self alignment by using an electropolishing system, wherein a reaction tube, an etchant solution, an electrode, a constant current source and the silicon substrate, said etchant solution being contained in a space confined by the reaction tube and the substrate, which is attached to one end of the reaction tube in such a way that the bottom of the substrate may be toward the interior of the space, said constant current source being connected with a metal layer formed on the substrate and the electrode. The substrate is made to be porous by flowing a constant current and etched by the action of the etchant solution while breaking the current. In addition to being economical, the methods can determine the position and size of the hole accurately and precisely. Further, neither chemical damage nor mechanical impact is generated on the substrate.

Abstract translation: 公开了用于自对准蚀刻衬底的电抛光方法。 通过使用电抛光系统在基板中形成孔，其中反应管，蚀刻剂溶液，电极，恒流源和硅衬底，所述蚀刻剂溶液包含在由反应管限制的空间中 以及基板，其以使得基板的底部朝向空间的内部的方式附接到反应管的一端，所述恒定电流源与形成在基板上的金属层和电极 。 通过流动恒定电流使衬底多孔，并通过蚀刻溶液的作用在破坏电流的同时进行蚀刻。 除了经济以外，这些方法可以精确准确地确定孔的位置和尺寸。 此外，在基板上既不会产生化学损伤也不产生机械冲击。

公开(公告)号：US09938139B2

公开(公告)日：2018-04-10

申请号：US15033015

申请日：2013-10-30

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Roger A. McKay ,  Patrick W. Sadik

IPC: B81C1/00 ,  H01M4/38 ,  H01M4/04 ,  C23C14/58 ,  C23F1/16 ,  C23F1/02

CPC classification number: B81C1/00539 ,  B81B2201/058 ,  B81C1/00119 ,  B81C2201/0115 ,  B81C2201/014 ,  C23C14/5873 ,  C23F1/02 ,  C23F1/16 ,  H01M4/0492 ,  H01M4/386

Abstract: Etching islands are formed on a first face of a substrate and a second face of the substrate non-parallel to the first face. The first face and the second face of the substrate are concurrently exposed to a solution that reacts with the etching islands to concurrently form porous regions extending into the first face and the second face.

公开(公告)号：US20160054160A1

公开(公告)日：2016-02-25

申请号：US14933982

申请日：2015-11-05

Applicant: XIANG ZHENG TU

Inventor： XIANG ZHENG TU

IPC: G01F1/692 ,  H01L35/34

CPC classification number: G01F1/692 ,  B81C1/00158 ,  B81C1/00246 ,  B81C1/00571 ,  B81C2201/0115 ,  B81C2201/0142 ,  G01F1/6845 ,  G01F1/688 ,  H01L21/3063 ,  H01L35/34

Abstract: A vacuum-cavity-insulated flow sensor and related fabrication method are described. The sensor comprises a porous silicon wall with numerous vacuum-pores which is created in a silicon substrate, a porous silicon membrane with numerous vacuum-pores which is surrounded and supported by the porous silicon wall, and a cavity with a vacuum-space which is disposed beneath the porous silicon membrane and surrounded by the porous silicon wall. The fabrication method includes porous silicon formation and silicon polishing in HF solution.

Abstract translation: 描述了真空腔绝缘流量传感器及相关的制造方法。 传感器包括具有许多真空孔的多孔硅壁，其形成于硅衬底中，多孔硅膜具有许多真空孔，该多孔硅膜被多孔硅壁包围和支撑，以及具有真空空间的空腔， 设置在多孔硅膜下方并被多孔硅壁包围。 制造方法包括HF溶液中的多孔硅形成和硅研磨。

公开(公告)号：US09212940B2

公开(公告)日：2015-12-15

申请号：US13607352

申请日：2012-09-07

Applicant: Xiang Zheng Tu

Inventor： Xiang Zheng Tu

IPC: G01F1/68 ,  G01F1/688 ,  G01F1/684 ,  G01F1/692

CPC classification number: G01F1/692 ,  B81C1/00158 ,  B81C1/00246 ,  B81C1/00571 ,  B81C2201/0115 ,  B81C2201/0142 ,  G01F1/6845 ,  G01F1/688 ,  H01L21/3063 ,  H01L35/34

Abstract: A vacuum-cavity-insulated flow sensor and related fabrication method are described. The sensor comprises a porous silicon wall with numerous vacuum-pores which is created in a silicon substrate, a porous silicon membrane with numerous vacuum-pores which is surrounded and supported by the porous silicon wall, and a cavity with a vacuum-space which is disposed beneath the porous silicon membrane and surrounded by the porous silicon wall. The fabrication method includes porous silicon formation and silicon polishing in HF solution.

Abstract translation: 描述了真空腔绝缘流量传感器及相关的制造方法。 传感器包括具有许多真空孔的多孔硅壁，其形成于硅衬底中，多孔硅膜具有许多真空孔，该多孔硅膜被多孔硅壁包围和支撑，以及具有真空空间的空腔， 设置在多孔硅膜下方并被多孔硅壁包围。 制造方法包括HF溶液中的多孔硅形成和硅研磨。

公开(公告)号：US08716052B2

公开(公告)日：2014-05-06

申请号：US13688746

申请日：2012-11-29

Applicant: Commissariat a l'energie atomique et aux energies alternatives

Inventor： Philippe Robert

IPC: H01L21/00

CPC classification number: H01L21/20 ,  B81B2203/0109 ,  B81B2203/0118 ,  B81C1/00626 ,  B81C2201/0115 ,  B81C2201/019 ,  G01P15/0802

Abstract: A method for making a structure comprising an active part comprising at least two layers from a first single crystal silicon substrate, said method comprising the steps of: a) making at least one porous silicon zone in the first substrate, b) making an epitaxial growth deposition of a single crystal silicon layer on the entire surface of the first substrate and the surface of the porous silicon zone, c) machining the epitaxially grown single crystal layer at the porous silicon zone to make a first suspended zone, d) removing or oxidizing the porous silicon, e) depositing a sacrificial layer being selective towards silicon, f) machining the first substrate, g) releasing the suspended zones by withdrawing the sacrificial layer.

Abstract translation: 一种用于制造包括由第一单晶硅衬底至少包含两层的有源部分的结构的方法，所述方法包括以下步骤：a）在所述第一衬底中制备至少一个多孔硅区，b）制备外延生长 在第一基板的整个表面和多孔硅区域的表面上沉积单晶硅层，c）在多孔硅区域加工外延生长的单晶层以制成第一悬浮区，d）去除或氧化 多孔硅，e）沉积对硅有选择性的牺牲层，f）加工第一衬底，g）通过抽出牺牲层来释放悬浮区。

公开(公告)号：US08273653B2

公开(公告)日：2012-09-25

申请号：US12477798

申请日：2009-06-03

Applicant: Greja Johanna Adriana Maria Verheijden ,  Roel Daamen ,  Gerhard Koops

Inventor： Greja Johanna Adriana Maria Verheijden ,  Roel Daamen ,  Gerhard Koops

IPC: H01L21/00

CPC classification number: B81C1/00293 ,  B81C2201/0115 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: A method of packaging a micro electromechanical structure is disclosed. The method comprises the steps of forming the structure on a substrate, depositing a sacrificial layer over the structure, patterning the sacrificial layer, depositing a porous layer over the patterned sacrificial layer, removing the patterned sacrificial layer through the porous layer, treating the porous layer with a plasma and depositing a capping layer over the plasma-treated porous layer. The plasma treatment step ensures that the capping layer material cannot enter the cavity formed by the removal of the sacrificial layer through the porous layer. A device formed by this method is also disclosed.

Abstract translation: 公开了一种封装微机电结构的方法。 该方法包括以下步骤：在衬底上形成结构，在结构上沉积牺牲层，图案化牺牲层，在图案化的牺牲层上沉积多孔层，通过多孔层去除图案化的牺牲层，处理多孔层 并在等离子体处理的多孔层上沉积覆盖层。 等离子体处理步骤确保了封盖层材料不能进入通过多孔层去除牺牲层而形成的空腔。 还公开了通过该方法形成的器件。

公开(公告)号：US20120115311A1

公开(公告)日：2012-05-10

申请号：US13293652

申请日：2011-11-10

Applicant: Sébastien DESPLOBAIN ,  Frederic-Xavier GAILLARD ,  Yves MORAND ,  Fabrice NEMOUCHI

Inventor： Sébastien DESPLOBAIN ,  Frederic-Xavier GAILLARD ,  Yves MORAND ,  Fabrice NEMOUCHI

IPC: H01L21/30

CPC classification number: H01L21/306 ,  B81C1/0038 ,  B81C2201/0109 ,  B81C2201/0115

Abstract: The method for forming a multilayer structure on a substrate comprises providing a stack successively comprising an electron hole blocking layer, a first layer made from N-doped semiconductor material having a dopant concentration greater than or equal to 1018 atoms/cm3or P-doped semiconductor material, and a second layer made from semiconductor material of different nature. A lateral electric contact pad is made between the first layer and the substrate, and the material of the first layer is subjected to anodic treatment in an electrolyte.

Abstract translation: 在衬底上形成多层结构的方法包括提供连续包含电子空穴阻挡层的叠层，由具有大于或等于1018原子/ cm 3的掺杂浓度的N掺杂半导体材料或P掺杂半导体材料制成的第一层 ，以及由不同性质的半导体材料制成的第二层。 在第一层和衬底之间形成横向电接触垫，并且在电解质中对第一层的材料进行阳极处理。

公开(公告)号：US08076169B2

公开(公告)日：2011-12-13

申请号：US12488882

申请日：2009-06-22

Applicant: Francois Perruchot ,  Bernard Diem ,  Vincent Larrey ,  Laurent Clavelier ,  Emmanuel Defay

Inventor： Francois Perruchot ,  Bernard Diem ,  Vincent Larrey ,  Laurent Clavelier ,  Emmanuel Defay

IPC: H01L21/00

CPC classification number: B81C1/00238 ,  B81B2201/0271 ,  B81C1/00357 ,  B81C2201/0115 ,  B81C2201/014 ,  B81C2201/0191

Abstract: The invention relates to a method of fabricating an electromechanical device including an active element, wherein the method comprises the following steps:a) making a monocrystalline first stop layer on a monocrystalline layer of a first substrate;b) growing a monocrystalline mechanical layer epitaxially on said first stop layer out of at least one material that is different from that of the stop layer;c) making a sacrificial layer on said active layer out of a material that is suitable for being etched selectively relative to said mechanical layer;d) making a bonding layer on the sacrificial layer;e) bonding a second substrate on the bonding layer; andf) eliminating the first substrate and the stop layer to reveal the surface of the mechanical layer opposite from the sacrificial layer, the active element being made by at least a portion of the mechanical layer.

Abstract translation: 本发明涉及一种制造包括有源元件的机电装置的方法，其中该方法包括以下步骤：a）在第一衬底的单晶层上制备单晶第一阻挡层; b）在所述第一停止层上外延生长至少一种不同于所述停止层的材料的单晶机械层; c）在适合于相对于所述机械层选择性蚀刻的材料中在所述有源层上制造牺牲层; d）在牺牲层上形成结合层; e）在接合层上粘合第二衬底; 以及f）消除所述第一衬底和所述阻挡层以露出与所述牺牲层相对的所述机械层的表面，所述有源元件由所述机械层的至少一部分制成。