Abstract:
A tuning circuit comprising a first reactance, a second reactance and a insulated gate field effect transistor having a gate arranged to receive a control signal. The first reactance is connected between the source of the field effect transistor and a first node. The second reactance has the same value as the first reactance and is connected between the drain of the field effect transistor and a second node. The first and second nodes are arranged so as to experience a balanced ac signal. Turning the field effect transistor on has the effect of making the first and second reactances effective in the circuit and vice versa.
Abstract:
An oscillator circuit with connectable capacitance makes it possible for the oscillator to change over between at least two frequencies. A switching unit is provided for the changeover. The switching unit has a first switch which is connected between the switchable capacitances, and also further switches, which are connected with respect to a supply voltage terminal. Compared with conventional oscillators that can be changed over, the novel circuit provides for the advantage that a particularly low forward resistance takes effect in the switched-on state of the connectable capacitances and particularly small parasitic capacitances nevertheless take effect in the switched-off state. The oscillator circuit can be implemented with a particularly small chip area since the switches can be integrated in a common transistor structure with a common control terminal. The oscillator circuit is particularly suitable for mobile radio applications.
Abstract:
A switched variable capacitor (20), and binary-weighted array (40) of such capacitors (20), are disclosed. The switched variable capacitor (20) includes a switching transistor (14) connected in series with first and second capacitors (12), between the two terminals (A,B). Bias transistors (18) are provided, and of opposite conductivity type as the switching transistor (14) but with their gates connected to the gate of the switching transistor (14). The bias transistors (18), when on, apply a reverse bias voltage to the source/drain regions of the switching transistor (14), to minimize the parasitic junction capacitance, and thus improve the temperature stability of the capacitor (20). A binary-weighted array (40) of switched variable capacitors (20) is also disclosed, as is a voltage-controlled oscillator (50) incorporating such an array (40).
Abstract:
A voltage-controlled piezoelectric resonator may be implemented without requiring the use of a trimmer capacitor by virtue of the use of a capacitor array with or without an additional capacitor array, thus reducing the number of external parts. The capacitor array and the additional capacitor array can be packaged in an IC, thus enabling reduction in the size of the voltage-controlled piezoelectric resonator. The voltage-controlled piezoelectric resonator incorporating the capacitor array exhibits high stability both in terms of secular change and operation, which in turn ensures high stability of operation of a piezoelectric oscillation circuit incorporating this voltage-controlled piezoelectric resonator. An oscillation center frequency adjusting mechanism produces adjusting data, so that the adjustment of the oscillation center frequency can be effected purely electrically. Since mechanical adjusting operation that is essential in conventional arrangements is unnecessary, the time required for the adjustment of the oscillation center frequency is shortened to allow a reduction in the production cost of the voltage-controlled piezoelectric resonator.
Abstract:
The invention relates to a digitally adjustable crystal oscillator having a quartz crystal and a monolithic integrated oscillator circuit including a series combination of a first frequency-adjusting capacitor C1 and a second frequency-adjusting capacitor C2 connected in parallel with the quartz crystal and comprising parallel-connected first capacitance stages and parallel-connected second capacitance stages, respectively, and an inverter circuit connected in parallel with the quartz crystal and comprising a feedback resistor R.sub.K, the output of the innverter circuit being connected to a load resistor. The inverter circuit comprises parallel-connected inverter stages, and switching elements are provided within the inverter stages and cqapacitor stages in such a way that a respective one of the inverter stages as well as a first capacitance stage C.sub.1i and a second capacitance stage C.sub.2i are switchable into or out of circuit by means of a control signal I.sub.i.
Abstract:
The present invention provides for a voltage-controlled crystal oscillator (VCXO) which, other than the crystal itself, is full integrated. The VCXO has a pre-amplifier block, a gain stage, a first MOS transistor, a first capacitor, a second MOS transistor, and a one second capacitor. The pre-amplifier block receives an input tuning voltage and the gain stage is connected across the terminals of the oscillating crystal. The first MOS transistor and first capacitor are connected between one of the terminals of the oscillating crystal and a reference voltage. The second MOS transistor and the second capacitor are connected between the second crystal terminal and the reference voltage. The gates of both MOS transistors are connected to the output node of the pre-amplifier block. The first and second MOS transistors connect the first and second capacitors to the first and second terminals of the gain stage for a portion of the time responsive to the input tuning voltage. Thus the oscillating crystal has a load capacitance, which varies according to the input tuning voltage, so that the frequency of the VCXO varies according to the input tuning voltage.
Abstract:
In a phase-lock-loop circuit a frequency detector measures a frequency error between an oscillatory signal and a synchronizing signal in alternate horizontal line periods for generating a frequency error indicative signal. The frequency error indicative signal is applied to an oscillator for correcting the frequency error in other alternate horizontal line periods in a manner to prevent frequency error measurement and correction from occurring in the same horizontal line period.
Abstract:
An device having an oscillator circuit modifiable between a first operating mode and a second operating mode, wherein the first operating mode has a first frequency accuracy and a first power consumption, wherein the second operating mode has a second frequency accuracy and a second power consumption, wherein the second frequency accuracy is more accurate than the first frequency accuracy and the second power consumption is higher than the first power consumption, and a control circuit in communication with the oscillator circuit to modify the operating mode of the oscillator circuit.
Abstract:
An LC tank circuit, such as an LC tank circuit of a step-tuned voltage controlled oscillator, includes a plurality of switched capacitor banks and one or more inductors. A first switched capacitor bank switch in response to a range of control signals used to control the VCO output across a range of frequencies. A second switched capacitor bank can switch in response to a subset of the range of control signals used to control the VCO output across a subset of the range of frequencies. The control scheme for the first and second switched capacitor banks can improves the linearity of changes in the frequency of the output signal of the VCO.
Abstract:
Embodiments of the present disclosure may provide a circuit comprising a tank circuit. The tank circuit may include an inductor having a pair of terminals, a first pair of transistors, and a first pair of capacitors. Each transistor may be coupled between a respective terminal of the inductor and a reference voltage along a source-to-drain path of the transistor. Each capacitor may be provided in a signal path between an inductor terminal coupled to a respective first transistor in the first pair and a gate of a second transistor in the first pair.