公开(公告)号：US07756084B2

公开(公告)日：2010-07-13

申请号：US11743448

申请日：2007-05-02

Applicant: Ailin Deng ,  Lin Chen

Inventor： Ailin Deng ,  Lin Chen

IPC: H04W4/00

CPC classification number: H04W16/00 ,  H04B1/707

Abstract: A method for improving communication quality in a CDMA system includes: storing, groups of quality control parameters for a BS covered by the BSC; adopting, by the BS and an MS covered by the BS, one of the groups of the quality control parameters to interact with each other when the MS sets up a call; monitoring, during the call, communication quality parameters reported by the BS or by the MS; and selecting one of the groups of the quality control parameters according to the communication quality parameters and transmitting the group of the quality control parameters selected to the BS or the MS. A system and a BSC are also disclosed by the embodiments of the present invention. The solution provided by the embodiments of the present invention may improve the communication quality in areas with weak signals.

Abstract translation: 一种用于提高CDMA系统中的通信质量的方法包括：存储由BSC覆盖的BS的质量控制参数组; 当MS建立呼叫时，由BS和MS所涵盖的MS采用质量控制参数的组之一进行交互; 在通话期间监视由BS或MS报告的通信质量参数; 以及根据所述通信质量参数选择所述质量控制参数组中的一组，并将选择的所述质量控制参数的组发送给所述BS或所述MS。 本发明的实施例也公开了系统和BSC。 由本发明实施例提供的解决方案可以改善弱信号区域的通信质量。

公开(公告)号：US20100156368A1

公开(公告)日：2010-06-24

申请号：US12317223

申请日：2008-12-19

Applicant: Steven Huynh ,  Matthew A. Grant ,  Lin Chen

Inventor： Steven Huynh ,  Matthew A. Grant ,  Lin Chen

IPC: G05F1/46

CPC classification number: H02M3/158 ,  H02J7/0065 ,  H02M3/07 ,  Y10T307/50 ,  Y10T307/944

Abstract: A power converter having a switched capacitor buck/boost operation has first and second switches coupled to a first switching node, third and fourth switches coupled to a second switching node, a capacitor coupled between the first and second switching nodes, and an inductor coupled to the first switching node. A switch controller controls the switches to operate in voltage step-down mode and voltage step-up mode depending on a difference between converter output voltage VOUT and converter input voltage VIN. In a buck-optimized topology operating in a step-down mode, an output current flowing through the first switching node flows through only one switch at a given time. In a boost-optimized topology operating in a step-up mode, an output current flowing through the first switching node flows through only one switch at a given time. As a result, a more compact and efficient power converter may be realized at lower cost.

公开(公告)号：US20100111020A1

公开(公告)日：2010-05-06

申请号：US12607688

申请日：2009-10-28

Applicant: Lin Chen ,  He Yuan Huang ,  Qian Ma ,  Yin Ben Xia ,  Yan Feng Zhu

Inventor： Lin Chen ,  He Yuan Huang ,  Qian Ma ,  Yin Ben Xia ,  Yan Feng Zhu

IPC: H04W72/12 ,  H04W40/00

CPC classification number: H04W72/042 ,  H04W72/0426 ,  H04W72/0486 ,  H04W72/08

Abstract: A method for selecting a channel for an access point (AP) in a Wireless Local Area Network (WLAN). The method includes the AP receiving network conditions of APs within the sensing range of a terminal sent by the terminal, and the AP selecting a channel based on the received network conditions. By forwarding the network conditions of other APs which can be detected by the terminal, the method of the present invention enables an AP to select a channel from the view of a terminal to avoid conflicts at the terminal, thereby improving the available bandwidth of the terminal, and giving a better experience to users.

Abstract translation: 一种用于在无线局域网（WLAN）中选择接入点（AP）的信道的方法。 该方法包括AP在终端发送的终端的感测范围内接收AP的网络状况，AP根据接收的网络条件选择一个信道。 通过转发终端可以检测的其他AP的网络状况，本发明的方法使得AP能够从终端的角度选择一个信道，以避免终端冲突，从而提高终端的可用带宽 ，并为用户提供更好的体验。

公开(公告)号：US20090089763A1

公开(公告)日：2009-04-02

申请号：US11864563

申请日：2007-09-28

Applicant: Lin Chen ,  Guofang Jiao ,  Chihong Zhang ,  Junhong Sun

Inventor： Lin Chen ,  Guofang Jiao ,  Chihong Zhang ,  Junhong Sun

IPC: G06F9/45

CPC classification number: G06T15/50 ,  G06F8/41

Abstract: The present disclosure includes a shader compiler system and method. In an embodiment, a shader compiler includes a decoder to translate an instruction having a vector representation to a unified instruction representation. The shader compiler also includes an encoder to translate an instruction having a unified instruction representation to a processor executable instruction.

Abstract translation: 本公开包括着色器编译器系统和方法。 在一个实施例中，着色器编译器包括将具有向量表示的指令转换为统一指令表示的解码器。 着色器编译器还包括将具有统一指令表示的指令转换为处理器可执行指令的编码器。

公开(公告)号：US20090070131A1

公开(公告)日：2009-03-12

申请号：US12159683

申请日：2006-06-27

Applicant: Lin Chen

Inventor： Lin Chen

IPC: G06Q10/00 ,  E04B1/00

CPC classification number: E04H1/005 ,  E04B2001/0053 ,  G06Q10/103

Abstract: A mesh-sheet standardized block module includes a standardized house module, an animal/plant type house artistic module, or other building, and a mesh-sheet standardized block underground space module. The mesh-sheet standardized block module further includes a net-like standardized road/bridge module and a net-like standardized canal module, and may be replicated and assembled to form a standardized urban product with a required scale. The standardized urban product has a scientific layout, appropriate function, fresh air, exquisite landscape, and fluent traffic. Moreover, due to its high efficiency and low cost, the standardized urban product has significant economic benefits, and may create a profit of 20,000 billion US dollars, and provide plenty of jobs. In addition the criteria and methods for manufacturing a standardized urban product with no traffic jam, but exquisite environment, low price, and commodity house markets in various prices are provided through technical schemes for countries with water sources such as China, the USA, India, and Nigeria.

Abstract translation: 网格标准化块模块包括标准化房屋模块，动物/植物型房屋艺术模块或其他建筑物，以及网格标准化的地下空间模块。 网格标准化块模块还包括网状标准化道路/桥接模块和网状标准化渠道模块，并且可以被复制和组装以形成具有所需规模的标准化城市产品。 标准化城市产品科学布局，功能适用，空气清新，景观精湛，交通流畅。 而且由于效率高，成本低，标准化城市产品具有重大的经济效益，创造了2亿美元的利润，提供了大量的就业机会。 另外，通过中国，美国，印度等国家的水资源技术方案，为各种价格制造标准化城市产品的标准和方法提供了不含交通堵塞的标准化城市产品，环境优良，价格低廉，商品房市场， 和尼日利亚。

公开(公告)号：US20070288781A1

公开(公告)日：2007-12-13

申请号：US11732783

申请日：2007-04-03

Applicant: Joseph Macri ,  Steven Morein ,  Claude Gauthier ,  Ming-Ju Lee ,  Lin Chen

Inventor： Joseph Macri ,  Steven Morein ,  Claude Gauthier ,  Ming-Ju Lee ,  Lin Chen

IPC: G06F1/00

CPC classification number: G06F1/3203 ,  G06F1/3253 ,  Y02D10/151 ,  Y02D50/20

Abstract: Embodiments of a power consumption reduction process for memory interfaces are described. A power management process reduces the amount of time that current flows in a high or low terminated, current or voltage mode unipolar bus interface by reducing the amount of time the bus remains in a logic state that requires current flow.

Abstract translation: 描述用于存储器接口的功耗降低过程的实施例。 电源管理过程通过减少总线保持在需要电流的逻辑状态的时间量，减少电流在高或低端接，电流或电压模式单极总线接口中流动的时间。

公开(公告)号：US20070098163A1

公开(公告)日：2007-05-03

申请号：US11592074

申请日：2006-11-01

Applicant: Joseph Macri ,  Stephen Morein ,  Claude Gauthier ,  Ming-Ju Lee ,  Lin Chen

Inventor： Joseph Macri ,  Stephen Morein ,  Claude Gauthier ,  Ming-Ju Lee ,  Lin Chen

IPC: H04N7/167

CPC classification number: G06F11/10

Abstract: A system and method for detecting errors in high-speed asymmetric interfaces are described. Embodiments include transmitting digital data between a first system component and a second system component over a bidirectional interface, wherein the first component is significantly more intelligent than the second component. The first component controls many operations of the second component, including receiving a signature from the second component over an existing line of the interface. The signature received is compared to a signature stored by the first component. Both signatures correspond to a transaction over the interface. Based on the comparison, the first component determines whether the transaction was successful, and directs the second component as necessary.

Abstract translation: 描述了用于检测高速非对称接口中的错误的系统和方法。 实施例包括通过双向接口在第一系统组件和第二系统组件之间传输数字数据，其中第一组件比第二组件明显更智能。 第一个组件控制第二个组件的许多操作，包括通过接口的现有行接收来自第二个组件的签名。 所接收的签名与由第一组件存储的签名进行比较。 两个签名对应于接口上的事务。 基于比较，第一个组件确定事务是否成功，并根据需要引导第二个组件。

公开(公告)号：US20070038789A1

公开(公告)日：2007-02-15

申请号：US11357291

申请日：2006-02-17

Applicant: Joseph Macri ,  Stephen Morein ,  Ming-Ju Lee ,  Lin Chen

Inventor： Joseph Macri ,  Stephen Morein ,  Ming-Ju Lee ,  Lin Chen

IPC: G06F13/42

CPC classification number: H04L25/4915 ,  H03L7/07 ,  H03L7/0805 ,  H03L7/0814 ,  H04L7/0004 ,  H04L7/0008 ,  H04L7/0037 ,  H04L7/0337

Abstract: A dynamic bus inversion (DBI) method and system are described. In various embodiments, a transmitter transmits data over a multi-bit high-speed bus to a receiver. In an embodiment, the transmitter determines whether to invert the bus based on the number of data bits that will be transitioning to a new value. If it is determined that the bus is to be inverted, the transmitter encodes a DBI signal on a shared line of the bus. In an embodiment, the shared line is used for different purposes at different times, obviating the need for a dedicated line or pin for the encoded DBI signal. The receiver receives and decodes the DBI signal and, in response, appropriately decodes the received data.

Abstract translation: 描述了动态总线反演（DBI）方法和系统。 在各种实施例中，发射机通过多比特高速总线向接收机发送数据。 在一个实施例中，发射机基于将要转换到新值的数据比特数来确定是否反转总线。 如果确定总线被反相，则发送器对总线的共享线路上的DBI信号进行编码。 在一个实施例中，共享线路在不同时间用于不同的目的，从而避免了对编码的DBI信号的专用线路或引脚的需要。 接收器接收并解码DBI信号，作为响应，对接收到的数据进行适当的解码。

公开(公告)号：US20050287133A1

公开(公告)日：2005-12-29

申请号：US11135264

申请日：2005-05-23

Applicant: Minmin Qin ,  Gary Zecherle ,  Wai-Pan Chan ,  Paul Fitzpatrick ,  Stuart Swiedler ,  John Henstrand ,  Dan Wendt ,  Lin Chen ,  Christopher Starr

Inventor： Minmin Qin ,  Gary Zecherle ,  Wai-Pan Chan ,  Paul Fitzpatrick ,  Stuart Swiedler ,  John Henstrand ,  Dan Wendt ,  Lin Chen ,  Christopher Starr

IPC: A61K38/00 ,  A61K38/46 ,  A61K48/00 ,  C12N9/16

CPC classification number: B01D15/327 ,  A61K38/00 ,  A61K48/00 ,  B01D15/3804 ,  B01D15/3828 ,  C12N9/16 ,  C12Y301/06012

Abstract: The present invention provides a highly purified recombinant, human precursor N-acetylgalactosamine-4-sulfatase and biologically active mutants, fragments and analogs thereof as well as pharmaceutical formulations comprising highly purified recombinant human precursor N-acetylgalactosamine-4-sulfatase. The invention also provides methods for treating diseases caused all or in part by deficiencies in human N-acetylgalactosamine-4-sulfatase including MPS VI and methods for producing and purifying the recombinant precursor enzyme to a highly purified form.

Abstract translation: 本发明提供高度纯化的重组人前体N-乙酰半乳糖胺-4-硫酸酯酶及其生物活性突变体，其片段和类似物以及包含高度纯化的重组人前体N-乙酰半乳糖胺-4-硫酸酯酶的药物制剂。 本发明还提供了用于治疗全部或部分由包括MPS VI在内的人N-乙酰半乳糖胺-4-硫酸酯酶缺陷引起的疾病的方法，以及用于将重组前体酶生产和纯化成高度纯化形式的方法。

公开(公告)号：US20050246596A1

公开(公告)日：2005-11-03

申请号：US10986030

申请日：2004-11-12

Applicant: Lin Chen ,  Sou Chen

Inventor： Lin Chen ,  Sou Chen

IPC: G06K5/04 ,  G11B5/00 ,  G11B20/20 ,  H03H11/26 ,  H03K5/00 ,  H03K5/13 ,  H03L7/00

CPC classification number: H03K5/131 ,  H03K2005/00058 ,  H03K2005/00084 ,  H03K2005/00156

Abstract: An auto-calibration method is applied to a delay circuit, which includes a plurality of delay chains. One of the delay chains is previously designated as the delay path where data output from the delay circuit passes through. The accumulative number of errors is continuously detected and counted during a unit of time when the delay circuit is in use. If the number of accumulative errors of the designated delay path is larger than a threshold value, the delay circuit scans all the delay chains and records their accumulative error numbers during a unit of time; otherwise, the designated delay path keeps what it do. Afterwards, the number of accumulative errors is compared between all the delay chains to find out which one of the delay chains has a minimum accumulative error number, and the delay chain with a minimum accumulative error number is designated as a new current delay path. Then, the number of accumulative errors of the new designated delay path is continuously observed on whether it is larger than the threshold value. The aforesaid steps are performed again according to the observation.

Abstract translation: 自动校准方法被应用于包括多个延迟链的延迟电路。 延迟链之一被预先指定为延迟电路输出的数据通过的延迟路径。 在使用延迟电路的时间单位内，连续地检测和计数累积误差数。 如果指定延迟路径的累积误差数大于阈值，则延迟电路扫描所有延迟链，并在一个时间单位内记录其累积误差数; 否则，指定的延迟路径保持它的作用。 之后，在所有的延迟链之间比较累积误差的数量，找出延迟链中哪一个具有最小累积误差数，将具有最小累积误差数的延迟链指定为新的当前延迟路径。 然后，连续观察新的指定延迟路径的累计误差的数量是否大于阈值。 根据观察，再次进行上述步骤。