公开(公告)号：US07405632B2

公开(公告)日：2008-07-29

申请号：US11589774

申请日：2006-10-31

Applicant: Yusuke Kishino

Inventor： Yusuke Kishino

IPC: H03B5/08 ,  H03B5/10 ,  H03B5/12

CPC classification number: H03B5/1231 ,  H03B5/1215 ,  H03B5/1265 ,  H03B2201/0266

Abstract: A voltage-controlled oscillator includes (i) a first variable-capacity element, (ii) a resonance circuit whose resonance frequency changes in accordance with a control voltage applied to the first variable-capacity element, (iii) a second variable-capacity element connected in parallel with the first variable-capacity element, (iv) resonance frequency range switching means which switches the variation range of the resonance frequency of the resonance circuit by switching the capacity of the second variable-capacity element, and (v) a resonance frequency correction circuit which corrects the resonance frequency in such a manner as to prevent the ratio between resonance frequencies before and after the switching of the variation range from depending on the control voltage.

Abstract translation: 压控振荡器包括：（i）第一可变容量元件，（ii）谐振频率根据施加到第一可变电容元件的控制电压而变化的谐振电路，（iii）第二可变电容元件 （iv）谐振频率范围切换装置，其通过切换第二可变容量元件的容量来切换谐振电路的谐振频率的变化范围，以及（v）共振 频率校正电路，其以这样的方式校正谐振频率，以防止根据控制电压的变化范围的切换之前和之后的谐振频率之间的比率。

公开(公告)号：US07400206B2

公开(公告)日：2008-07-15

申请号：US11089857

申请日：2005-03-24

Applicant: Wenjung Sheng ,  Shyam S. Somayajula ,  Xue-Mei Gong

Inventor： Wenjung Sheng ,  Shyam S. Somayajula ,  Xue-Mei Gong

IPC: H03B5/12

CPC classification number: H03K3/0307 ,  H03B5/36 ,  H03B2201/0266 ,  H03K3/012

Abstract: In one embodiment, the present invention includes methods and apparatus for providing initial control values to programmable load capacitors of an oscillator, such as that of a real time clock circuit. Using the initial values, the real time clock circuit may begin operation, enabling additional circuitry within an integrated circuit to begin operation. This additional circuitry may cause operating values to program the load capacitors to provide a desired reference clock based on a given system's requirements.

Abstract translation: 在一个实施例中，本发明包括用于向诸如实时时钟电路的振荡器的可编程负载电容器提供初始控制值的方法和装置。 使用初始值，实时时钟电路可以开始运行，使集成电路中的附加电路能够开始运行。 这个额外的电路可以使操作值对负载电容器进行编程，以根据给定的系统要求提供所需的参考时钟。

公开(公告)号：US07394329B2

公开(公告)日：2008-07-01

申请号：US11227421

申请日：2005-09-14

Applicant: Peter Vancorenland ,  Lysander Lim ,  Augusto M. Marques ,  Scott D. Willingham

Inventor： Peter Vancorenland ,  Lysander Lim ,  Augusto M. Marques ,  Scott D. Willingham

IPC: H03B5/12

CPC classification number: H03J3/185 ,  H03B5/1243 ,  H03B5/1293 ,  H03B2200/0062 ,  H03B2201/0208 ,  H03B2201/0266 ,  H03J7/10 ,  H03J2200/36 ,  H03L7/099

Abstract: An oscillator includes a plurality of varactor cells to receive a control signal to control a frequency of the oscillator. Each of the varactor cells includes a switch that includes a first terninal to receive the control signal and a second terminal such that the switch operates to control a capacitance of the varactor cell in response to a voltage between the first and second terminals. The oscillator includes a bias circuit to provide a different bias voltage to each second terminal and an amplifier that is coupled to the varactor cells to generate an oscillating signal.

Abstract translation: 振荡器包括多个变容二极管单元，用于接收控制信号以控制振荡器的频率。 每个变容二极管单元包括开关，该开关包括用于接收控制信号的第一三极管和第二端子，使得开关操作以响应于第一和第二端子之间的电压来控制变容二极管的电容。 振荡器包括偏置电路，以向每个第二端子提供不同的偏置电压，以及耦合到变容二极管单元以产生振荡信号的放大器。

公开(公告)号：US07375601B2

公开(公告)日：2008-05-20

申请号：US11389413

申请日：2006-03-23

Applicant: Hiroki Kobayashi

Inventor： Hiroki Kobayashi

IPC: H03B5/12

CPC classification number: H03B5/1231 ,  H03B5/1218 ,  H03B5/1243 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2201/0266

Abstract: When two oscillation signals are output from a common terminal through switching, to reduce attenuation of the oscillation signals, a dual-band oscillator includes a first oscillating transistor for generating an oscillation signal in a first frequency band; a first inductor for supplying power to a collector of the first oscillating transistor; a first switching element for switching the first oscillating transistor; a second oscillating transistor for generating an oscillation signal in a second frequency band; a second inductor for supplying power to a collector of the second oscillating transistor; a second switching element for switching the second oscillating transistor; and an output terminal for outputting the oscillation signal in the first frequency band or in the second frequency band. The first switching element is disposed between the first inductor and the output terminal, and the second switching element is disposed between the second inductor and the output terminal.

Abstract translation: 当通过开关从公共端子输出两个振荡信号时，为了减少振荡信号的衰减，双频带振荡器包括用于产生第一频带的振荡信号的第一振荡晶体管; 用于向第一振荡晶体管的集电极供电的第一电感器; 用于切换第一振荡晶体管的第一开关元件; 用于在第二频带中产生振荡信号的第二振荡晶体管; 用于向第二振荡晶体管的集电极供电的第二电感器; 用于切换第二振荡晶体管的第二开关元件; 以及用于输出第一频带或第二频带中的振荡信号的输出端子。 第一开关元件设置在第一电感器和输出端子之间，第二开关元件设置在第二电感器和输出端子之间。

公开(公告)号：US07276970B2

公开(公告)日：2007-10-02

申请号：US11131281

申请日：2005-05-18

Applicant: Haideh Khorramabadi

Inventor： Haideh Khorramabadi

IPC: H03F3/45

CPC classification number: H03L7/23 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/364 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03F1/3211 ,  H03F1/52 ,  H03F3/191 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2203/45318 ,  H03F2203/45704 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H03L7/18 ,  H01L2924/00

Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. The filters incorporate a gain stage that provides improved dynamic range through the use of cross coupled auxiliary differential pair CMOS amplifiers to cancel distortion in a main linearized differential pair amplifier. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure. Shunts utilize a gate boosting at each pin to discharge ESD build up. An IF VGA utilizes distortion cancellation achieved with cross coupled differential pair amplifiers having their Vds dynamically modified in conjunction with current steering of the differential pairs sources.

Abstract translation: 具有通道选择和图像抑制的集成接收器基本上在单个CMOS集成电路上实现。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 与图像抑制混合器一起集成到衬底上的LC滤波器提供图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 有源滤波器利用具有屏蔽的多轨螺旋电感器来增加电路Q.滤波器包括增益级，其通过使用交叉耦合辅助差分对CMOS放大器来消除主线性化差分对放大器中的失真而提供改进的动态范围。 频率规划提供额外的镜像抑制。 本地振荡器信号产生方法在芯片上减少失真。 PLL产生所需的带外LO信号。 直接合成产生带内LO信号。 PLL VCO自动居中。 差分晶体振荡器提供频率参考。 使用整个接收机的差分信号传输。 ESD保护由衬垫环和ESD夹紧结构提供。 分流器利用每个引脚上的门极升压来放电ESD积聚。 IF VGA利用交叉耦合的差分对放大器实现的失真消除，其具有与差分对源的当前转向结合动态修改的V ds。

公开(公告)号：US07271673B2

公开(公告)日：2007-09-18

申请号：US11171860

申请日：2005-06-30

Applicant: Hongjiang Song

Inventor： Hongjiang Song

IPC: H03B5/08

CPC classification number: H03B5/1228 ,  H03B5/1215 ,  H03B5/1243 ,  H03B5/1265 ,  H03B2200/0048 ,  H03B2200/005 ,  H03B2201/0208 ,  H03B2201/0266

Abstract: In accordance with certain described implementations, a voltage controlled oscillator (VCO) includes a VCO coarse tuning bank having multiple coarse tuning bank bits. Each coarse tuning bank bit has an associated bit capacitance. The bit capacitances of the coarse tuning bank bits may be selectively engaged using, for example, a single switching transistor for each coarse tuning bank bit.

Abstract translation: 根据某些描述的实施方案，压控振荡器（VCO）包括具有多个粗调谐存储体位的VCO粗调谐组。 每个粗调谐组位都有相关的位电容。 可以使用例如用于每个粗调谐组位的单个开关晶体管来选择性地接合粗调谐组位的位电容。

公开(公告)号：US07132888B2

公开(公告)日：2006-11-07

申请号：US10809838

申请日：2004-03-26

Applicant: Arya R. Behzad

Inventor： Arya R. Behzad

IPC: H03F3/45

CPC classification number: H03F1/3211 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0026 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/3011 ,  H03B5/364 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H03L7/23 ,  H01L2924/00

Abstract: An integrated receiver with channel selection and image rejection is substantially implemented on a single CMOS integrated circuit. A receiver front end provides programable attenuation and a programable gain low noise amplifier. LC filters integrated onto the substrate in conjunction with image reject mixers provide image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. Active filters utilize multi track spiral inductors with shields to increase circuit Q. Frequency planning provides additional image rejection. Local oscillator signal generation methods on chip reduce distortion. A PLL generates needed out of band LO signals. Direct synthesis generates in band LO signals. PLL VCOs are centered automatically. A differential crystal oscillator provides a frequency reference. Differential signal transmission throughout the receiver is used. ESD protection is provided by a pad ring and ESD clamping structure. Shunts utilize a gate boosting at each pin to discharge ESD build up. An IF VGA utilizes distortion cancellation achieved with cross coupled differential pair amplifiers having their Vds dynamically modified in conjunction with current steering of the differential pairs sources.

Abstract translation: 具有通道选择和图像抑制的集成接收器基本上在单个CMOS集成电路上实现。 接收机前端提供可编程衰减和可编程增益低噪声放大器。 与图像抑制混合器一起集成到衬底上的LC滤波器提供图像频率抑制。 过滤器调谐和电感Q补偿温度在芯片上执行。 有源滤波器利用具有屏蔽的多轨螺旋电感器来增加电路Q.频率规划提供额外的图像抑制。 本地振荡器信号产生方法在芯片上减少失真。 PLL产生所需的带外LO信号。 直接合成产生带内LO信号。 PLL VCO自动居中。 差分晶体振荡器提供频率参考。 使用整个接收机的差分信号传输。 ESD保护由衬垫环和ESD夹紧结构提供。 分流器利用每个引脚上的门极升压来放电ESD积聚。 IF VGA利用交叉耦合的差分对放大器实现的失真消除，其具有与差分对源的当前转向结合动态修改的V ds。

公开(公告)号：US07084713B2

公开(公告)日：2006-08-01

申请号：US11043385

申请日：2005-01-25

Applicant: Vincenzo F. Peluso

Inventor： Vincenzo F. Peluso

IPC: H03B1/00 ,  H03B5/00 ,  H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1215 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1287 ,  H03B5/1293 ,  H03B2201/0266 ,  H03B2201/0283 ,  H03J1/005 ,  H03J2200/10

Abstract: A programmable capacitor bank includes multiple tuning elements. Each tuning element includes two tuning capacitors and a pass transistor that electrically connects or disconnects the capacitors to/from common nodes. For a thermometer decoded capacitor bank, the tuning capacitors for all tuning elements have equal capacitance. Each tuning element further includes at least one pull-up transistor that provides high bias voltage for the pass transistor and at least one pull-down transistor that provides low bias voltage for the pass transistor. The multiple tuning elements may be arranged in a ladder topology such that (1) the tuning elements are turned on in sequential order starting from one end of the ladder and going toward the other end of the ladder and (2) each tuning element receives biasing from a preceding tuning element and provides biasing to a succeeding tuning element. The capacitor bank may be used for VCOs and other circuits.

Abstract translation: 可编程电容器组包括多个调谐元件。 每个调谐元件包括两个调谐电容器和将电容器与公共节点电连接或断开的通过晶体管。 对于温度计解码电容器组，用于所有调谐元件的调谐电容器具有相等的电容。 每个调谐元件还包括提供用于传输晶体管的高偏置电压的至少一个上拉晶体管和为传输晶体管提供低偏置电压的至少一个下拉晶体管。 多个调谐元件可以被布置成梯形拓扑结构，使得（1）调谐元件从梯子的一端开始并且朝着梯子的另一端顺序地接通，并且（2）每个调谐元件接收偏置 并且向后续的调谐元件提供偏置。 电容器组可用于VCO和其他电路。

公开(公告)号：US07019598B2

公开(公告)日：2006-03-28

申请号：US10665631

申请日：2003-09-22

Applicant: Ralph Duncan ,  Tom W. Kwan

Inventor： Ralph Duncan ,  Tom W. Kwan

IPC: H03B5/04 ,  H03B5/12

CPC classification number: H03L7/23 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1253 ,  H03B5/364 ,  H03B2200/0038 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H01L2924/00

Abstract: An integrated VCO having an improved tuning range over process and temperature variations. There is therefore provided in a present embodiment of the invention an integrated VCO. The VCO comprises, a substrate, a VCO tuning control circuit responsive to a VCO state variable that is disposed upon the substrate, and a VCO disposed upon the substrate, having a tuning control voltage input falling within a VCO tuning range for adjusting a VCO frequency output, and having its tuning range adjusted by the tuning control circuit in response to the VCO state variable.

公开(公告)号：US20060028282A1

公开(公告)日：2006-02-09

申请号：US11048151

申请日：2005-01-31

Applicant: Bour-Yi Sze ,  Chih-Long Ho ,  Da-Wei Sung

Inventor： Bour-Yi Sze ,  Chih-Long Ho ,  Da-Wei Sung

IPC: H03L7/00

CPC classification number: H03L7/10 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B2201/0266 ,  H03C3/0958 ,  H03J5/244 ,  H03L7/099 ,  H03L2207/06

Abstract: Improved voltage controlled oscillator (VCO) circuits are disclosed. A symmetrical voltage controlled oscillator (VCO) system according to the embodiments of the present invention comprises a frequency tuning circuit containing one or more varactors for receiving a predetermined tuning signal and a frequency tuning bias signal for altering capacitances of the varactors, a modulation circuit coupled in parallel with the frequency tuning circuit containing one or more varactors for modulating one or more outputs, and a core circuit coupled in a parallel with the tuning circuit and the modulation circuit for providing an oscillation mechanism, wherein the core circuit has an inductance module coupled in a parallel fashion with the frequency tuning circuit and the modulation circuit, wherein circuit elements of the VCO system are symmetrically arranged for increasing oscillation efficiency thereof and the varactors are tuned to deliver the output at an output frequency.

Abstract translation: 公开了改进的压控振荡器（VCO）电路。 根据本发明的实施例的对称压控振荡器（VCO）系统包括频率调谐电路，其包含用于接收预定调谐信号的一个或多个变容二极管和用于改变变容二极管的电容的频率调谐偏置信号，调制电路耦合 与包含用于调制一个或多个输出的一个或多个变容二极管的频率调谐电路并联，以及与调谐电路并联耦合的核心电路和用于提供振荡机构的调制电路，其中所述核心电路具有耦合的电感模块 与频率调谐电路和调制电路并行地组合，其中VCO系统的电路元件被对称地布置以提高其振荡效率，并且可变电抗器被调谐以输出输出频率。