Sandwich arc structure for preventing metal to contact from shifting
    171.
    发明授权
    Sandwich arc structure for preventing metal to contact from shifting 有权
    三明治弧形结构,防止金属接触转移

    公开(公告)号:US07097921B2

    公开(公告)日:2006-08-29

    申请号:US10446927

    申请日:2003-05-29

    CPC classification number: C23C28/00 H01L23/53223 H01L2924/0002 H01L2924/00

    Abstract: A sandwich ARC structure for preventing metal to contact from shifting, the sandwich ARC structure comprising a first Ti layer formed on a metal laer and a first TiN layer formed on the first Ti layer. A second Ti layer is formed on the first TiN layer and a second TiN layer is formed on the second Ti layer. Wherein the sandwich ARC structure formed of first Ti/first TiN/second Ti/second TiN will reduces the tress between said metal layer and a dielectric layer formed below the metal layer.

    Abstract translation: 一种用于防止金属接触移动的夹层ARC结构,所述夹层ARC结构包括形成在金属层上的第一Ti层和形成在第一Ti层上的第一TiN层。 在第一TiN层上形成第二Ti层,在第二Ti层上形成第二TiN层。 其中由第一Ti /第一TiN /第二Ti /第二TiN形成的夹层ARC结构将减少所述金属层和形成在金属层下面的电介质层之间的发束。

    Hot plate cooling system
    172.
    发明授权

    公开(公告)号:US07051800B2

    公开(公告)日:2006-05-30

    申请号:US09727946

    申请日:2000-12-01

    CPC classification number: H01L21/67109 F28F3/12

    Abstract: A cooling system for a hot plate. The cooling system includes a plurality of pipelines inside the hot plate. Each pipeline has an inlet and an outlet. The inlet permits a cooling fluid to enter and the outlet permits the cooling fluid to leave. The cooling fluid running inside the pipelines picks up heat from the hot plate and carries away so that the hot plate is cooled.

    Method of forming a dual-layer resist and application thereof
    175.
    发明授权
    Method of forming a dual-layer resist and application thereof 有权
    形成双层抗蚀剂的方法及其应用

    公开(公告)号:US06908854B2

    公开(公告)日:2005-06-21

    申请号:US10715413

    申请日:2003-11-19

    Applicant: Ching-Yu Chang

    Inventor: Ching-Yu Chang

    Abstract: A method of forming a dual-layer resist and application thereof. With respect to the method of forming a dual-layer resist, first, a patterned first resist layer is formed on a substrate. Next, the first resist layer is cured so that the first resist layer does not dissolve in a resist solvent. Finally, a patterned second resist layer is formed on the cured first resist layer. The method of forming a dual-layer resist can be applied to mask ROM coding, hole formation and a dual damascene structure.

    Abstract translation: 一种形成双层抗蚀剂的方法及其应用。 关于形成双层抗蚀剂的方法,首先,在基板上形成图案化的第一抗蚀剂层。 接下来,使第一抗蚀剂层固化,使得第一抗蚀剂层不溶于抗蚀剂溶剂。 最后,在固化的第一抗蚀剂层上形成图案化的第二抗蚀剂层。 可以应用形成双层抗蚀剂的方法来掩蔽ROM编码,孔形成和双镶嵌结构。

    Rework process of patterned photo-resist layer
    176.
    发明申请
    Rework process of patterned photo-resist layer 有权
    图案光刻胶层的返工工艺

    公开(公告)号:US20050009345A1

    公开(公告)日:2005-01-13

    申请号:US10720735

    申请日:2003-11-24

    CPC classification number: H01L21/0276 H01L21/0332 Y10S438/952

    Abstract: A rework process of patterned photo-resist layer is provided. First, a substrate is provided with a first DARC, a first primer and a first patterned photo-resist layer being sequentially formed thereon. Next, remove the first patterned photo-resist layer and the first primer from the first DARC. After that, form a second DARC on the first DARC; form a second primer on the second DARC. Last, form a second patterned photo-resist layer on the second primer.

    Abstract translation: 提供了图案化光刻胶层的返工工艺。 首先,在衬底上依次形成有第一DARC,第一底漆和第一图案化的光致抗蚀剂层。 接下来,从第一DARC去除第一图案化的光致抗蚀剂层和第一底漆。 之后,在第一个DARC上形成第二个DARC; 在第二个DARC上形成第二个引物。 最后,在第二底漆上形成第二图案的光致抗蚀剂层。

    Planarization method using anisotropic wet etching
    177.
    发明授权
    Planarization method using anisotropic wet etching 有权
    使用各向异性湿蚀刻的平面化方法

    公开(公告)号:US06787056B2

    公开(公告)日:2004-09-07

    申请号:US10067260

    申请日:2002-02-07

    CPC classification number: H01L21/31055 H01L21/31111

    Abstract: A planarization method using anisotropic etching can be applied to planarize an insulating layer with an uneven surface on a substrate. H2SO4, H3PO4, HF and H2O are mixed to form an etching solution. The substrate is placed into the etching solution to make the etching solution pass the surface of the insulating layer at a flow rate to etch the insulating layer. After a period of etching time, the insulating layer with a more planar surface can be obtained.

    Abstract translation: 可以应用使用各向异性蚀刻的平面化方法来平坦化具有基板上的不平坦表面的绝缘层。 将H 2 SO 4,H 3 PO 4,HF和H 2 O混合以形成蚀刻溶液。 将衬底放置在蚀刻溶液中以使蚀刻溶液以流速通过绝缘层的表面以蚀刻绝缘层。 经过一段时间的蚀刻时间后,可获得具有更平坦表面的绝缘层。

    Mask ROM structure having a coding layer between gates and word lines
    178.
    发明授权
    Mask ROM structure having a coding layer between gates and word lines 有权
    掩模ROM结构在门和字线之间具有编码层

    公开(公告)号:US06777762B2

    公开(公告)日:2004-08-17

    申请号:US10065645

    申请日:2002-11-05

    Applicant: Ching-Yu Chang

    Inventor: Ching-Yu Chang

    CPC classification number: H01L27/112 H01L27/1124

    Abstract: A Mask ROM and a method for fabricating the same are described. The Mask ROM comprises a substrate, a plurality of gates on the substrate, a gate oxide layer between the gates and the substrate, a plurality of buried bit lines in the substrate between the gates, an insulator on the buried bit lines and between the gates, a plurality of word lines each disposed over a row of gates perpendicular to the buried bit lines, and a coding layer between the word lines and the gates.

    Abstract translation: 描述了掩模ROM及其制造方法。 掩模ROM包括衬底,衬底上的多个栅极,栅极和衬底之间的栅极氧化物层,在栅极之间的衬底中的多个掩埋位线,掩埋位线上的绝缘体和栅极之间 ,多个字线,各自设置在与掩埋位线垂直的一行栅极上,以及在字线和栅极之间的编码层。

    Method of reducing charge loss for nonvolatile memory
    179.
    发明授权
    Method of reducing charge loss for nonvolatile memory 有权
    减少非易失性存储器的电荷损失的方法

    公开(公告)号:US06746968B1

    公开(公告)日:2004-06-08

    申请号:US10364428

    申请日:2003-02-12

    CPC classification number: H01L21/28273 H01L21/02046 H01L21/3105

    Abstract: A method of reducing charge loss for nonvolatile memory. First, a semiconductor substrate having a semiconductor device thereon is provided. Next, a dielectric layer is formed on the entire surface of the semiconductor substrate, and a thermal treatment is performed in an atmosphere containing a reactive gas, and the reactive gas reacts with free ions remaining on the semiconductor substrate from prior manufacturing processes. Finally, a metal layer is formed on the dielectric layer.

    Abstract translation: 一种减少非易失性存储器的电荷损失的方法。 首先,提供其上具有半导体器件的半导体衬底。 接下来,在半导体衬底的整个表面上形成电介质层,并且在含有反应性气体的气氛中进行热处理,并且反应性气体与先前的制造工艺中留在半导体衬底上的游离离子进行反应。 最后,在电介质层上形成金属层。

    Method of fabricating a non-volatile memory device to eliminate charge loss
    180.
    发明授权
    Method of fabricating a non-volatile memory device to eliminate charge loss 有权
    制造非易失性存储器件以消除电荷损失的方法

    公开(公告)号:US06713388B2

    公开(公告)日:2004-03-30

    申请号:US10063199

    申请日:2002-03-28

    Abstract: A memory device is formed on a silicon substrate. A blocking layer is thereafter formed to cover a stacked gate of the memory device. A gettering layer is formed on the blocking layer followed by planarizing of the gettering layer to a predetermined thickness. A first barrier layer is then formed on the gettering layer. A contact hole is formed to penetrate through the first barrier layer, the gettering layer and the blocking layer down to the surface of the memory device. Following that, a second barrier layer is created to cover the first barrier layer and the contact hole. Finally, portions of the second barrier layer are etched back to make a barrier spacer on the side wall of the contact hole. Therein, the first barrier layer and the barrier spacer prevent mobile atoms from vertically diffusing and laterally diffusing, respectively, into the memory device.

    Abstract translation: 存储器件形成在硅衬底上。 此后形成阻挡层以覆盖存储器件的堆叠栅极。 在阻挡层上形成吸气层,然后将吸气层平坦化至预定厚度。 然后在吸气层上形成第一阻挡层。 形成接触孔,以穿过第一阻挡层,吸气层和阻挡层,直到存储器件的表面。 之后,产生第二阻挡层以覆盖第一阻挡层和接触孔。 最后,第二阻挡层的部分被回蚀刻以在接触孔的侧壁上形成隔离隔离物。 其中,第一阻挡层和阻挡间隔物分别防止移动原子垂直扩散并横向扩散到存储器件中。

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