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公开(公告)号：US10826613B1
公开(公告)日：2020-11-03
申请号：US16706450
申请日：2019-12-06
Applicant: INPHI CORPORATION
Inventor： Ding Liang , Mark Patterson , Roberto Coccioli , Radhakrishnan L. Nagarajan
Abstract: An integrated compact light engine configured in a on-board in-package optics assembly. The compact light engine includes a single substrate to integrate multiple optical-electrical modules. Each optical-electrical module includes an integrated optical transceiver based on silicon-photonics platform, in which a transmit path configured to output four light signals centered at four CWDM wavelengths and from four laser devices and to modulate the four light signals respectively by four modulators driven by a driver chipand to deliver a multiplexed transmission light. A receive path includes a photodetector to detect four input signals demultiplexed from an incoming light and a trans-impedance amplifier chip to process electrical signals converted from the four input signals detected. A multi-channel light engine is formed by co-integrating or co-mounting a switch device with multiple compact light engines on a common substrate member to provide up to 51.2 Tbit/s total capacity of data communication with median-or-short-reach electrical interconnect.
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公开(公告)号：US20200343990A1
公开(公告)日：2020-10-29
申请号：US16926344
申请日：2020-07-10
Applicant: INPHI CORPORATION
Inventor： Radhakrishnan L. NAGARAJAN
Abstract: An integrated apparatus with optical/electrical interfaces and protocol converter on a single silicon substrate. The apparatus includes an optical module comprising one or more modulators respectively coupled with one or more laser devices for producing a first optical signal to an optical interface and one or more photodetectors for detecting a second optical signal from the optical interface to generate a current signal. Additionally, the apparatus includes a transmit lane module coupled between the optical module and an electrical interface to receive a first electric signal from the electrical interface and provide a framing protocol for driving the one or more modulators. Furthermore, the apparatus includes a receive lane module coupled between the optical module and the electrical interface to process the current signal to send a second electric signal to the electrical interface.
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公开(公告)号：US20200321985A1
公开(公告)日：2020-10-08
申请号：US16904381
申请日：2020-06-17
Applicant: INPHI CORPORATION
Inventor： Damian Alfonso MORERO , Mario Alejandro CASTRILLON , Matias German SCHNIDRIG , Mario Rafael HUEDA
Abstract: A decoder performs forward error correction based on quasi-cyclic regular column-partition low density parity check codes. A method for designing the parity check matrix reduces the number of short-cycles of the matrix to increase performance. An adaptive quantization post-processing technique further improves performance by eliminating error floors associated with the decoding. A parallel decoder architecture performs iterative decoding using a parallel pipelined architecture.
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公开(公告)号：US10771065B2
公开(公告)日：2020-09-08
申请号：US16664666
申请日：2019-10-25
Applicant: INPHI CORPORATION
Inventor： Simon Forey , Parmanand Mishra , Michael S. Harwood , Rajasekhar Nagulapalli
IPC: H03L7/08 , H03L7/07 , H03L7/081 , H03L7/099 , H03L7/187 , H03K5/135 , H02M3/07 , H03L7/093 , H04L7/00 , H04L7/033
Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the present invention provide a charge pump, which can be utilized as a part of a clock data recovery device. Early and late signals are used as differential switching voltage signals in the charge pump. The first switch and a second switch are used for controlling the direction of the current flowing into the loop filter. Input differential voltages to the switches are being generated with an opamp negative feedback loop. The output voltage of the first switch and the second switch is used in conjunction with a resistor to generate a charge pump current. There are other embodiments as well.
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公开(公告)号：US20200264373A1
公开(公告)日：2020-08-20
申请号：US16814825
申请日：2020-03-10
Applicant: INPHI CORPORATION
Inventor： Jie LIN , Masaki KATO
Abstract: The present application discloses a Transverse Electric (TE) polarizer. The TE polarizer includes a semiconductor substrate having an oxide layer. The TE polarizer further includes a waveguide embedded in the oxide layer. Additionally, the TE polarizer includes a plate structure embedded in the oxide layer substantially in parallel to the waveguide with a gap distance. In an embodiment, the plate structure induces an extra transmission loss to a Transverse Magnetic (TM) mode in a light wave traveling through the waveguide.
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Patent Agency Ranking
公开(公告)号：US10659337B2
公开(公告)日：2020-05-19
申请号：US16115291
申请日：2018-08-28
Applicant: INPHI CORPORATION
Inventor： Jamal Riani , Arash Farhoodfar , Sudeep Bhoja , Tarun Setya
Abstract: The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide a retimer module that includes plurality of communication lanes for interfacing with a host system and a line system. The retimer module includes a link monitor and cross point sections. The retimer also includes a management interface module. There are other embodiments as well.
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公开(公告)号：US10651930B2
公开(公告)日：2020-05-12
申请号：US16387209
申请日：2019-04-17
Applicant: INPHI CORPORATION
Inventor： Shih Cheng Wang , Seyedmohammadreza Motaghiannezam , Matthew C. Bashaw
IPC: H04J14/02 , H04B10/079 , H04L27/01 , H04L5/00 , H04B10/2507 , H04B10/61 , H04L25/03 , H04B10/07 , H04L7/00 , H04N5/21
Abstract: A receiver applies a calibration method to compensate for skew between input channels. The receiver skew is estimated by observing the coefficients of an adaptive equalizer which adjusts the coefficients based on time-varying properties of the multi-channel input signal. The receiver skew is compensated by programming the phase of the sampling clocks for the different channels. Furthermore, during real-time operation of the receiver, channel diagnostics is performed to automatically estimate differential group delay and/or other channel characteristics based on the equalizer coefficients using a frequency averaging or polarization averaging approach. Framer information can furthermore be utilized to estimate differential group delay that is an integer multiple of the symbol rate. Additionally, a DSP reset may be performed when substantial signal degradation is detected based on the channel diagnostics information.
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188.发明申请公开(公告)号：US20200127739A1
公开(公告)日：2020-04-23
申请号：US16720472
申请日：2019-12-19
Applicant: INPHI CORPORATION
Inventor： Todd ROPE , Sung CHOI , James STEWART , Radhakrishnan L. NAGARAJAN , Paul YU , Ilya LYUBOMIRSKY
Abstract: The present invention is directed to a communication signal tracking system comprising an optical receiver including one or more delay line interferometers (DLIs) configured to demultiplex incoming optical signals and a transimpedance amplifier configured to convert the incoming optical signals to incoming electrical signals. The communication signal tracking system further includes a control module configured to calculate a bit-error-rate (BER) of the incoming electrical signals before forward-error correction decoding, and use the BER as a parameter for optimizing settings of the one or more DLIs in one or more iterations in a control loop and generating a back-channel data.
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公开(公告)号：US10601449B2
公开(公告)日：2020-03-24
申请号：US16575236
申请日：2019-09-18
Applicant: INPHI CORPORATION
Inventor： Benjamin Smith , Arash Farhoodfar , Stewart Crozier , Frank R. Kschischang , Andrew Hunt
Abstract: For some applications such as high-speed communication over short-reach links, the complexity and associated high latency provided by existing modulators may be unsuitable. According to an aspect, the present disclosure provides a modulator that can reduce latency for applications such as 40G/100G communication over copper cables or SMF. The modulator has a symbol mapper for mapping a bit stream into symbols, and a multi-level encoder including an inner encoder and an outer encoder for encoding only a portion of the bit stream. In some implementations, the multi-level encoder is configured such that an information block size of the inner encoder is small and matches a field size of the outer encoder. Therefore, components that would be used to accommodate larger block sizes can be omitted. The effect is that complexity and latency can be reduced. According to another aspect, the present disclosure provides a demodulator that is complementary to the modulator.
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公开(公告)号：US20200076158A1
公开(公告)日：2020-03-05
申请号：US16679014
申请日：2019-11-08
Applicant: INPHI CORPORATION , Luxnet Corporation
Inventor： Radhakrishnan L. NAGARAJAN , Peng-Chih LI , Pi-Cheng LAW
Abstract: A packaged transmitter device includes a base member comprising a planar part mounted with a thermoelectric cooler, a transmitter, and a coupling lens assembly, and an assembling part connected to one side of the planar part. The device further includes a circuit board bended to have a first end region and a second end region being raised to a higher level. The first end region disposed on a top surface of the planar part includes multiple electrical connection patches respectively connected to the thermoelectric and the transmitter. The second end region includes an electrical port for external connection. Additionally, the device includes a cover member disposed over the planar part. Furthermore, the device includes a cylindrical member installed to the assembling part for enclosing an isolator aligned to the coupling lens assembly along its axis and connected to a fiber to couple optical signal from the transmitter to the fiber.
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