利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

95 条记录 (耗时 0.027 秒)

    Writing to asymmetric memory
    11.
    发明授权
    Writing to asymmetric memory 有权
    写入不对称记忆

    公开(公告)号：US08266407B2

    公开(公告)日：2012-09-11

    申请号：US13053371

    申请日：2011-03-22

    申请人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

    发明人： Vijay Karamcheti ,  Kenneth A. Okin ,  Kumar Ganapathy ,  Ashish Singhai ,  Rajesh Parekh

    IPC分类号： G06F12/00

    CPC分类号： G06F12/1009 ,  G06F3/0604 ,  G06F3/0628 ,  G06F3/0638 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/0647 ,  G06F3/068 ,  G06F3/0685 ,  G06F9/5016 ,  G06F12/0207 ,  G06F12/0223 ,  G06F12/0292 ,  G06F12/08 ,  G06F12/10 ,  G06F12/121 ,  G06F12/1475 ,  G06F13/1657 ,  G06F13/1694 ,  G06F2212/205 ,  G06F2212/657 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/22

    摘要： A memory controller writes to a virtual address associated with data residing within an asymmetric memory component of main memory that is within a computer system and that has a symmetric memory component, while preserving proximate other data residing within the asymmetric memory component. The symmetric memory component within the main memory of the computer system is configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component during the writing of that address. The asymmetric memory component is configured to enable block write operations in which writing to an address within a region of the asymmetric memory component affects the availability of other addresses within the region of the asymmetric memory component during the block write operations involving the address.

    摘要翻译： 存储器控制器写入与驻留在计算机系统内的主存储器的非对称存储器组件内的数据相关联的虚拟地址，并且具有对称存储器组件，同时保留驻留在非对称存储器组件内的邻近其他数据。 计算机系统的主存储器内的对称存储器组件被配置为实现随机存取写入操作，其中写入对称存储器组件的块内的地址而不影响对称存储器组件的块内的其他地址的可用性 写这个地址。 非对称存储器组件被配置为启用块写入操作，其中对非对称存储器组件的区域内的地址的写入在涉及地址的块写入操作期间影响非对称存储器组件的区域内的其他地址的可用性。

    Distributing Metadata Across Multiple Different Disruption Regions Within an Asymmetric Memory System
    15.
    发明申请
    Distributing Metadata Across Multiple Different Disruption Regions Within an Asymmetric Memory System 有权
    在非对称存储器系统内跨多个不同中断区域分发元数据

    公开(公告)号：US20090157989A1

    公开(公告)日：2009-06-18

    申请号：US12335499

    申请日：2008-12-15

    申请人： Vijay Karamcheti ,  Ashish Singhai

    发明人： Vijay Karamcheti ,  Ashish Singhai

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0246 ,  G06F2212/1032 ,  G06F2212/7207 ,  G06F2212/7208

    摘要： Metadata that corresponds to application data is distributed across different disruption regions of an asymmetric memory component such that metadata is written in the same disruption region as the application data to which it corresponds. A first block of application data is written to a first disruption region and a second block of application data is written to a second disruption region. A first block of metadata corresponding to the first block of application data and a second block of metadata corresponding to the second block of application data both are generated. The first block of metadata is written to the first disruption region and the second block of metadata is written to the second disruption region such that the first and second blocks of metadata are written to the same disruption regions as the blocks of application data to which they correspond.

    摘要翻译： 对应于应用数据的元数据分布在非对称存储器组件的不同中断区域上，使得元数据被写入与其对应的应用数据相同的中断区域。 应用数据的第一块被写入第一中断区域，并且第二应用数据块被写入第二中断区域。 生成对应于第一应用程序数据块的元数据的第一块和对应于第二应用程序数据块的元数据的第二块。 元数据的第一块被写入第一中断区域，并且第二块元数据被写入第二中断区域，使得第一和第二元数据块被写入到与它们的应用数据块相同的中断区域 对应。

    MANAGING MEMORY SYSTEMS CONTAINING COMPONENTS WITH ASYMMETRIC CHARACTERISTICS
    16.
    发明申请
    MANAGING MEMORY SYSTEMS CONTAINING COMPONENTS WITH ASYMMETRIC CHARACTERISTICS 有权
    管理包含不对称特性的组件的存储系统

    公开(公告)号：US20090106479A1

    公开(公告)日：2009-04-23

    申请号：US12254767

    申请日：2008-10-20

    申请人： Kenneth A. Okin ,  Vijay Karamcheti

    发明人： Kenneth A. Okin ,  Vijay Karamcheti

    IPC分类号： G06F12/06

    CPC分类号： G06F12/02 ,  G06F11/1658 ,  G06F11/20 ,  G06F12/0246 ,  G06F12/06 ,  G06F12/08 ,  G06F12/10 ,  G06F2212/1032 ,  G06F2212/205 ,  G06F2212/7201 ,  G06F2212/7202 ,  G11C16/3418 ,  G11C16/3427

    摘要： A memory controller (MC) is associated with a remapping table to enable access to content in a memory system that includes asymmetric memory. The MC receives a request for a memory read or an Input/Output (I/O) write from a central processing unit (CPU) for a physical address specified by the system's memory management unit (MMU). The CPU uses the MMU to manage memory operations for the CPU, by translating the virtual addresses associated with CPU instructions into physical addresses representing system memory or I/O locations. The MC for asymmetric memories is configured to process the MMU-specified physical addresses as an additional type of virtual addresses, creating a layer of abstraction between the physical address specified by the MMU and the physical memory address with which that address is associated by the MC. The MC shields the CPU from the computational complexities required to implement a memory system with asymmetric components.

    摘要翻译： 存储器控制器（MC）与重映射表相关联，以使得能够访问包括非对称存储器的存储器系统中的内容。 MC从系统的存储器管理单元（MMU）指定的物理地址从中央处理单元（CPU）接收对存储器读取或输入/输出（I / O）写入的请求。 通过将与CPU指令关联的虚拟地址转换为表示系统内存或I / O位置的物理地址，CPU使用MMU来管理CPU的存储器操作。 用于非对称存储器的MC被配置为处理MMU指定的物理地址作为附加类型的虚拟地址，在MMU指定的物理地址与该地址由MC关联的物理存储器地址之间创建一个抽象层 。 MC屏蔽CPU免受实现具有不对称组件的存储系统所需的计算复杂性。

    Managing the write performance of an asymmetric memory system
    18.
    发明授权
    Managing the write performance of an asymmetric memory system 有权
    管理非对称存储器系统的写入性能

    公开(公告)号：US09588698B1

    公开(公告)日：2017-03-07

    申请号：US15077282

    申请日：2016-03-22

    申请人： Virident Systems Inc.

    发明人： Vijay Karamcheti ,  Ashish Singhai ,  Shibabrata Mondal ,  Ajith Kumar

    IPC分类号： G06F12/00 ,  G06F3/06 ,  G06F12/02

    CPC分类号： G06F3/061 ,  G06F3/0611 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F9/4881 ,  G06F9/5016 ,  G06F12/0246 ,  G06F2212/7206 ,  G06F2212/7208

    摘要： Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing the write requests into subgroups of write requests, where write requests within respective subgroups are mutually exclusive; ascertaining a load condition of each of several of the NVRAM devices of the NVRAM-based storage subsystem; identifying a target location on at least one NVRAM device to service a particular subgroup of write requests according to the ascertained load conditions of the NVRAM devices of the NVRAM-based storage subsystem; and servicing the particular subgroup of write requests by writing the corresponding units of data to the identified target location on the at least one NVRAM device of the NVRAM-based storage subsystem.

    摘要翻译： 一些实施方案包括管理基于非易失性随机存取存储器（NVRAM）的存储子系统的方法，该存储子系统包括NVRAM器件。 该方法包括：在主机计算设备上的设备驱动器处，接收每个请求将相应的数据单元写入到基于NVRAM的存储子系统的请求; 将写请求分类为写请求的子组，其中各子组内的写请求是相互排斥的; 确定基于NVRAM的存储子系统的几个NVRAM设备中的每一个的负载状况; 根据所确定的基于NVRAM的存储子系统的NVRAM设备的负载条件，在至少一个NVRAM设备上识别目标位置来服务特定的写请求子组; 以及通过将相应的数据单元写入到基于NVRAM的存储子系统的至少一个NVRAM设备上的所识别的目标位置来为特定的写请求组提供服务。

    Dynamic restriping in nonvolatile memory systems
    19.
    发明授权
    Dynamic restriping in nonvolatile memory systems 有权
    非易失性存储器系统中的动态重新安装

    公开(公告)号：US09286002B1

    公开(公告)日：2016-03-15

    申请号：US13841706

    申请日：2013-03-15

    申请人： Virident Systems Inc.

    发明人： Vijay Karamcheti ,  Swamy Gowda ,  Rajendra Prasad Mishra ,  Shibabrata Mondal

    IPC分类号： G06F12/00 ,  G06F3/06 ,  G06F11/18 ,  G11C29/00 ,  G06F11/22 ,  G06F11/20

    CPC分类号： G06F3/064 ,  G06F3/0619 ,  G06F3/0629 ,  G06F3/0647 ,  G06F3/0653 ,  G06F3/0688 ,  G06F11/108 ,  G06F11/1096 ,  G06F11/18 ,  G06F11/20 ,  G06F11/22 ,  G06F2201/84 ,  G06F2211/1028 ,  G06F2211/1059 ,  G11C29/70 ,  G11C29/76 ,  G11C29/765

    摘要： Data is stored as a first collection of memory blocks distributed across a first set of memory devices. It is determined that a first memory device in the first set is in a degraded state. Data is recovered corresponding to a first memory block in the first collection of memory blocks that is stored in the first memory device, which is configured to include a first number of memory blocks. The recovered data is stored in a second memory device as a new memory block, which is added to the first collection of memory blocks. The first memory device is removed from the first set and reconfigured with a second number of memory blocks that is less than the first number of memory blocks. Memory blocks in a second collection of memory blocks distributed across a second set of memory devices is stored in the reconfigured first memory device.

    摘要翻译： 数据被存储为分布在第一组存储器件上的存储块的第一集合。 确定第一组中的第一存储器件处于劣化状态。 数据被恢复对应于存储在第一存储器设备中的存储块的第一集合中的第一存储器块，其被配置为包括第一数量的存储器块。 恢复的数据作为新的存储器块存储在第二存储器件中，其被添加到存储块的第一集合中。 第一存储器件从第一组中移除并且被重新配置成小于第一数量的存储器块的第二数量的存储器块。 分配在第二组存储器设备上的第二存储器块集合中的存储器块被存储在重新配置的第一存储器设备中。