Abstract:
Provided is an optical device having an edge effect with improved phase shift and propagation loss of light without decreasing the dynamic characteristics of the optical device. The optical device includes a first semiconductor layer which is doped with a first type of conductive impurities, and has a recessed groove in an upper portion thereof; a gate insulating layer covering the groove and a portion of the first semiconductor layer; and a second semiconductor layer which covers an upper surface of the gate insulating layer and is doped with a second type of conductive impurities opposite to the first type of conductive impurities.
Abstract:
A method for arranging unit inductors of an inductor having metal wiring that can make a full use of self-inductance and mutual-inductance which are determined based on the proportion of the area of an unit inductor and the proportion of the overlapping area with another unit inductor, and an inductor adopting the unit inductor arranging method. The unit inductor arranging method, wherein the inductor includes a first unit inductor, a second inductor and a third inductor, and self-inductance magnitudes of the unit inductors are in the order of the self-inductance of the third inductor>the self-inductance of the second inductor>the self-inductance of the first inductor, includes the steps of: a) coupling one end of the second unit inductor is connected to one end of the first unit inductor and one end of the third unit inductor to the other end of the first unit inductor in order to arrange the first unit inductor between the second and third unit inductors of which mutual-inductance has the largest value in mutual-inductances between the unit inductors; b) coupling the second unit inductor to a first external terminal; and c) coupling the third unit inductor to a second external terminal.
Abstract:
A varactor includes a semiconductor substrate of a first conductivity type, a high-concentration buried collector region of a second conductivity type formed in an upper portion of the semiconductor substrate, a collector region of the second conductivity type formed on a first surface of the high-concentration buried collector region, a high-concentration collector contact region of the second conductivity type formed on a second surface of the high-concentration buried collector region, a high-concentration silicon-germanium base region of the first conductivity type formed on the collector region, a metal silicide layer formed on the silicon-germanium base region, a first electrode layer formed to contact the metal silicide layer, and a second electrode layer formed to be electrically connected to the collector contact region.
Abstract:
Provided is a photo detector. The photo detector includes: an avalanche photodiode; a bias circuit supplying a bias voltage to one end of the avalanche photodiode; a detection circuit connected to the other end of the avalanche photodiode and detecting a photoelectric current occurring in the avalanche photodiode; and a coupling capacitor connected to the one end or the other end of the avalanche photodiode and supplying a coupling voltage to drive the avalanche photodiode in a Geiger mode.
Abstract:
Provided is an optical device with improved phase shift and propagation loss of light without decreasing the dynamic characteristics of the optical device. The optical device includes a first semiconductor layer which is doped with a first type of conductive impurities and has a uniform thickness; a gate insulating layer which has a shape and is formed on a portion of the first semiconductor layer and has a thin center portion; and a second semiconductor layer which covers an upper surface of the gate insulating layer and is doped with a second type of conductive impurities opposite to the first type of conductive type impurities.
Abstract:
Provided is an avalanche photodetector with an integrated micro lens. The avalanche photodetector includes a light absorbing layer on a semiconductor substrate, an amplification layer on the light absorbing layer, a diffusion layer within the amplification layer, and the micro lens disposed corresponding to the diffusion layer. The micro lens includes a first refractive layer and a second refractive layer having a refractive index less than that of the first refractive layer.
Abstract:
Provided is a photo detector. The photo detector includes: an avalanche photodiode; a bias circuit supplying a bias voltage to one end of the avalanche photodiode; a detection circuit connected to the other end of the avalanche photodiode and detecting a photoelectric current occurring in the avalanche photodiode; and a coupling capacitor connected to the one end or the other end of the avalanche photodiode and supplying a coupling voltage to drive the avalanche photodiode in a Geiger mode.
Abstract:
Provided is a method of forming a compound semiconductor device. In the method, a dopant element layer is formed on an undoped compound semiconductor layer. An annealing process is performed to diffuse dopants in the dopant element layer into the undoped compound semiconductor layer, thereby forming a dopant diffusion region. A rapid cooling process is performed using liquid nitrogen with respect to the substrate having the dopant diffusion region.
Abstract:
Provided are a photoelectric device using a PN diode and a silicon integrated circuit (IC) including the photoelectric device. The photoelectric device includes: a substrate; and an optical waveguide formed as a PN diode on the substrate, wherein a junction interface of the PN diode is formed in a direction in which light advances; and an electrode applying a reverse voltage to the PN diode, wherein N-type and P-type semiconductors of the PN diode are doped at high concentrations and the doping concentration of the N-type semiconductor is higher than or equal to that of the P-type semiconductor.
Abstract:
Provided is an optical device having a strained buried channel area. The optical device includes: a semiconductor substrate of a first conductive type; a gate insulating layer formed on the semiconductor substrate; a gate of a second conductive type opposite to the first conductive type, formed on the gate insulating layer; a high density dopant diffusion area formed in the semiconductor substrate under the gate and doped with a first conductive type dopant having a higher density than the semiconductor substrate; a strained buried channel area formed of a semiconductor material having a different lattice parameter from a material of which the semiconductor substrate is formed and extending between the gate insulating layer and the semiconductor substrate to contact the high density dopant diffusion area; and a semiconductor cap layer formed between the gate insulating layer and the strained buried channel area.