公开(公告)号：US20120147312A1

公开(公告)日：2012-06-14

申请号：US13287512

申请日：2011-11-02

申请人： Hyung-Jun KIM ,  Chang-Oh JEONG

发明人： Hyung-Jun KIM ,  Chang-Oh JEONG

IPC分类号： G02F1/1343 ,  H01L33/08

CPC分类号： G02F1/136286 ,  G02F2001/133388

摘要： Provided are a display device and a method of manufacturing the same. The display device includes: a substrate divided into a display area and a peripheral area; a first metal wiring formed on the display area of the substrate; and a second metal wiring formed on the peripheral area of the substrate and including a gate driver. The first metal wiring is thicker than the second metal wiring.

摘要翻译： 提供一种显示装置及其制造方法。 该显示装置包括：分为显示区域和周边区域的基板; 形成在所述基板的显示区域上的第一金属布线; 以及形成在所述基板的周边区域上并包括栅极驱动器的第二金属布线。 第一金属布线比第二金属布线厚。

公开(公告)号：US08158499B2

公开(公告)日：2012-04-17

申请号：US12942910

申请日：2010-11-09

申请人： Je-hun Lee ,  Chang-oh Jeong ,  Beom-seok Cho ,  Yang-ho Bae

发明人： Je-hun Lee ,  Chang-oh Jeong ,  Beom-seok Cho ,  Yang-ho Bae

IPC分类号： H01L21/20

CPC分类号： H01L27/124 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L23/53238 ,  H01L27/12 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/3011 ,  Y10T29/49117 ,  H01L2924/00

摘要： Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate, and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including copper nitride and a copper conductive layer formed on the barrier layer and including copper or a copper alloy

摘要翻译： 提供一种线结构，制造线的方法，薄膜晶体管（TFT）基板以及制造TFT基板的方法。 导线结构包括形成在基板上的阻挡层，其包含形成在阻挡层上的包含铜或铜合金的二氧化铜和铜导电层

公开(公告)号：US20110140111A1

公开(公告)日：2011-06-16

申请号：US12859792

申请日：2010-08-20

申请人： Chang-Oh JEONG ,  Woo-Sung SOHN ,  Dong-Gyu KIM ,  Shi-Yul KIM ,  Ki-Yeup LEE ,  Jean-Ho SONG

发明人： Chang-Oh JEONG ,  Woo-Sung SOHN ,  Dong-Gyu KIM ,  Shi-Yul KIM ,  Ki-Yeup LEE ,  Jean-Ho SONG

IPC分类号： H01L33/08 ,  H01L21/336

CPC分类号： H01L33/16 ,  H01L27/124 ,  H01L27/1288

摘要： A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer.

摘要翻译： 提供了一种薄膜晶体管阵列面板，包括栅极线，覆盖栅极线的栅极绝缘层，设置在栅极绝缘层上的半导体层，以及设置在半导体层上的数据线和漏电极。 数据线和漏电极具有包括下层和上层的双层结构，其中下层具有突出于上层之外的第一部分，并且半导体层具有突出于下层边缘外侧的第二部分 。

公开(公告)号：US20110140103A1

公开(公告)日：2011-06-16

申请号：US13030213

申请日：2011-02-18

申请人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-OH JEONG

发明人： Je-Hun LEE ,  Do-Hyun KIM ,  Eun-Guk LEE ,  Chang-OH JEONG

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L29/7869 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288

摘要： A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.

摘要翻译： 薄膜晶体管包括半导体图案，源极和漏极以及栅极，半导体图案形成在基底基板上，半导体图案包括金属氧化物。 源极和漏极形成在半导体图案上，使得源极和漏极彼此间隔开，并且源极和漏极的轮廓与半导体图案的轮廓基本相同。 栅电极设置在源电极和漏电极之间的区域中，使得栅电极的一部分与源电极和漏电极重叠。 因此，由光引起的漏电流最小化。 结果，增强了薄膜晶体管的特性，减少了后图像以提高显示质量，并且提高了制造工艺的稳定性。

公开(公告)号：US07915650B2

公开(公告)日：2011-03-29

申请号：US11930502

申请日：2007-10-31

申请人： Je Hun Lee ,  Do Hyun Kim ,  Eun Guk Lee ,  Chang Oh Jeong

发明人： Je Hun Lee ,  Do Hyun Kim ,  Eun Guk Lee ,  Chang Oh Jeong

IPC分类号： H01L29/80 ,  H01L31/112

CPC分类号： H01L29/7869 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288

摘要： A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.

摘要翻译： 薄膜晶体管包括半导体图案，源极和漏极以及栅极，半导体图案形成在基底基板上，半导体图案包括金属氧化物。 源极和漏极形成在半导体图案上，使得源极和漏极彼此间隔开，并且源极和漏极的轮廓与半导体图案的轮廓基本相同。 栅电极设置在源电极和漏电极之间的区域中，使得栅电极的一部分与源电极和漏电极重叠。 因此，由光引起的漏电流最小化。 结果，增强了薄膜晶体管的特性，减少了后图像以提高显示质量，并且提高了制造工艺的稳定性。

公开(公告)号：US07902553B2

公开(公告)日：2011-03-08

申请号：US11930536

申请日：2007-10-31

申请人： Byoung-June Kim ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

发明人： Byoung-June Kim ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

IPC分类号： H01L29/04

CPC分类号： H01L27/1255 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66765

摘要： A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.

摘要翻译： 薄膜晶体管（TFT）的制造方法包括形成包括可以与硅组合的金属的栅电极，以在衬底上形成硅化物，并通过在栅极电极中向栅电极提供包括硅的气体形成栅极绝缘层 该方法还包括在栅极绝缘层上形成半导体，在半导体上形成数据线和漏极并形成连接到漏电极的像素电极。

公开(公告)号：US07888148B2

公开(公告)日：2011-02-15

申请号：US11850922

申请日：2007-09-06

申请人： Hong-Sick Park ,  Bong-Kyun Kim ,  Chang-Oh Jeong ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Won-Suk Shin ,  Byeong-Jin Lee

发明人： Hong-Sick Park ,  Bong-Kyun Kim ,  Chang-Oh Jeong ,  Jong-Hyun Choung ,  Sun-Young Hong ,  Won-Suk Shin ,  Byeong-Jin Lee

IPC分类号： H01L21/00

CPC分类号： C09K13/08 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2320/0223 ,  H01L23/53238 ,  H01L27/124 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/00

摘要： A thin film panel includes a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, a data line, including a source electrode, and a drain electrode formed on the gate insulating layer or the semiconductor layer, and a pixel electrode connected to the drain electrode, wherein at least one of the gate line and the data line and drain electrode includes a first conductive layer made of a molybdenum Mo-niobium Nb alloy and a second conductive layer made of a copper Cu-containing metal.

摘要翻译： 薄膜面板包括基板，形成在基板上的栅极线，形成在栅极线上的栅极绝缘层，形成在栅极绝缘层上的半导体层，包括源电极的数据线和形成的漏电极 在所述栅极绝缘层或所述半导体层上形成的像素电极和与所述漏极连接的像素电极，其中所述栅极线和所述数据线和漏极的至少一个包括由钼Mo-Nb铌合金构成的第一导电层，以及 由含铜铜金属制成的第二导电层。

公开(公告)号：US20110024759A1

公开(公告)日：2011-02-03

申请号：US12901324

申请日：2010-10-08

申请人： Jae-Gab LEE ,  Chang-Oh Jeong ,  Myung-Mo Sung ,  Hee-Jung Yang ,  Beom-Seok Cho

发明人： Jae-Gab LEE ,  Chang-Oh Jeong ,  Myung-Mo Sung ,  Hee-Jung Yang ,  Beom-Seok Cho

IPC分类号： H01L29/786 ,  H01L21/768

CPC分类号： H01L29/78603 ,  G02F2001/136295 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/458 ,  H01L29/4908 ,  H01L2224/32245

摘要： The present invention relates to a thin film transistor substrate and a metal wiring method thereof, more particularly to a thin film transistor substrate comprising self-assembled monolayers between the substrate and the metal wiring, and a metal wiring thereof. Since a thin film transistor substrate of the present invention comprises three-dimensionally cross-linked self-assembled monolayers between the Si surface and the metal wiring, it has good adhesion ability and anti-diffusion ability.

摘要翻译： 薄膜晶体管基板及其金属布线方法技术领域本发明涉及薄膜晶体管基板及其金属布线方法，更具体地涉及在基板和金属布线之间包括自组装单层的薄膜晶体管基板及其金属布线。 由于本发明的薄膜晶体管基板在Si表面和金属布线之间包含三维交联的自组装单层，因此具有良好的粘附能力和抗扩散能力。

公开(公告)号：US07879662B2

公开(公告)日：2011-02-01

申请号：US12573385

申请日：2009-10-05

申请人： Yang-Ho Bae ,  Chang-Oh Jeong ,  Byeong-Beom Kim

发明人： Yang-Ho Bae ,  Chang-Oh Jeong ,  Byeong-Beom Kim

IPC分类号： H01L21/00

CPC分类号： H01L29/458 ,  H01L27/124

摘要： A thin film transistor showing desirable contact characteristics during contact with indium tin oxide (ITO) or indium zinc oxide (IZO), in which a first conductive pattern including a gate electrode and a second conductive pattern including a source electrode and a drain electrode are formed without an etching process, a TFT substrate including the TFTs, and a method of manufacturing the same. The thin film transistor includes a gate electrode formed of a first conductive layer, a gate insulating layer covering the gate electrode, a semiconductor layer forming a channel on the gate insulating layer; an ohmic contact layer formed on the semiconductor layer, and a source electrode and a drain electrode formed of a second conductive layer and of a third conductive layer. The second conductive layer includes an aluminum-nickel alloy and nitrogen and is formed on the semiconductor layer. The third conductive layer includes an aluminum-nickel alloy and is formed on the second conductive layer.

摘要翻译： 在与铟锡氧化物（ITO）或铟锌氧化物（IZO）接触期间显示出期望的接触特性的薄膜晶体管，其中形成包括栅电极的第一导电图案和包括源电极和漏电极的第二导电图案 没有蚀刻处理，包括TFT的TFT基板及其制造方法。 薄膜晶体管包括由第一导电层形成的栅电极，覆盖栅电极的栅极绝缘层，在栅极绝缘层上形成沟道的半导体层; 形成在半导体层上的欧姆接触层，以及由第二导电层和第三导电层形成的源电极和漏电极。 第二导电层包括铝 - 镍合金和氮，并形成在半导体层上。 第三导电层包括铝镍合金，并形成在第二导电层上。

公开(公告)号：US20110012203A1

公开(公告)日：2011-01-20

申请号：US12605566

申请日：2009-10-26

申请人： Chang-Oh JEONG ,  Dong-Hoon LEE

发明人： Chang-Oh JEONG ,  Dong-Hoon LEE

IPC分类号： H01L27/088 ,  H01L21/84

CPC分类号： H01L27/12 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/66765

摘要： A thin film transistor panel includes; an insulating substrate, a gate line including a gate electrode disposed on the insulating substrate, a gate insulating layer disposed on the gate electrode, a semiconductor layer disposed on the gate insulating layer, the semiconductor layer including a sidewall, a data line including a source electrode disposed on the semiconductor layer, a drain electrode disposed substantially opposite to and spaced apart from the source electrode, a first protective film disposed on the data line, the first protective film including a sidewall, a second protective film disposed on the first protective film and including a sidewall, and a pixel electrode electrically connected to the drain electrode, wherein the sidewall of the second protective film is disposed inside an area where the sidewall of the first protective film is disposed, and the source electrode and the drain electrode cover the sidewall of the semiconductor layer.

摘要翻译： 薄膜晶体管面板包括： 绝缘基板，包括设置在绝缘基板上的栅电极的栅极线，设置在栅极上的栅极绝缘层，设置在栅极绝缘层上的半导体层，包括侧壁的半导体层，包括源极的数据线 设置在所述半导体层上的电极，与所述源极电极基本相对并间隔设置的漏电极，设置在所述数据线上的第一保护膜，所述第一保护膜包括侧壁，设置在所述第一保护膜上的第二保护膜 并且包括侧壁和与漏电极电连接的像素电极，其中第二保护膜的侧壁设置在设置有第一保护膜的侧壁的区域的内侧，源电极和漏电极覆盖 半导体层的侧壁。