公开(公告)号：US08656333B1

公开(公告)日：2014-02-18

申请号：US13466049

申请日：2012-05-07

Applicant: Craig Bishop ,  Christopher Scanlan ,  Tim Olson

Inventor： Craig Bishop ,  Christopher Scanlan ,  Tim Olson

IPC: G06F17/50 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L23/49838 ,  G06F17/5068 ,  G06F2217/40 ,  H01L24/05 ,  H01L24/06 ,  H01L24/19 ,  H01L24/20 ,  H01L2223/6677 ,  H01L2224/02375 ,  H01L2224/02377 ,  H01L2224/02379 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06154 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/96 ,  H01L2924/181 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/014 ,  H01L2924/00

Abstract: A plurality of approaches for forming a semiconductor device using an adaptive patterning method is disclosed. Some approaches include placing a semiconductor die unit on a carrier element, calculating trace geometry for a second set of traces, constructing a prestratum comprising a first set of traces, and constructing the second set of traces according to the calculated trace geometry. Forming the semiconductor device may further include electrically connecting at least one of the first set of traces to at least one of the second set of traces, and electrically connecting at least one bond pad of the semiconductor die unit to a destination pad through the at least one of the first set of traces and the at least one of the second set of traces.

Abstract translation: 公开了使用自适应图案化方法形成半导体器件的多种方法。 一些方法包括将半导体管芯单元放置在载体元件上，计算第二组迹线的迹线几何形状，构造包含第一组迹线的前置纹理，以及根据所计算的轨迹几何构造第二组轨迹。 形成半导体器件还可以包括将第一组迹线中的至少一个电连接到第二组迹线中的至少一个，并且将至少一个半导体管芯单元的接合焊盘至少通过至少一个电连接到目的地焊盘 第一组轨迹之一和第二组轨迹中的至少一个。

公开(公告)号：US20110045021A1

公开(公告)日：2011-02-24

申请号：US12903671

申请日：2010-10-13

Applicant: Ramond Allen Dwek ,  Christopher Scanlan ,  David Cameron Dunlop ,  Fatma MH Mansab ,  Sarah Erin Tully ,  Paul Wentworth ,  Nicole Zitmann

Inventor： Ramond Allen Dwek ,  Christopher Scanlan ,  David Cameron Dunlop ,  Fatma MH Mansab ,  Sarah Erin Tully ,  Paul Wentworth ,  Nicole Zitmann

IPC: A61K39/21 ,  C07H3/02 ,  A61P31/18

CPC classification number: A61K39/21 ,  A61K39/12 ,  A61K39/385 ,  A61K2039/6087 ,  A61K2039/645 ,  C07K14/005 ,  C12N2740/16122 ,  C12N2740/16134

Abstract: Disclosed are compositions and methods useful for inducing an immunogenic response in a subject or host. In particular, the compositions and methods may be directed to carbohydrate HIV vaccines and to methods of producing a carbohydrate HIV vaccine by introducing antigenic sugars into mimics of the glycans of the HIV envelope glycoproteins gp120 and gp41.

Abstract translation: 公开了用于在受试者或宿主中诱导免疫原性应答的组合物和方法。 特别地，组合物和方法可以针对碳水化合物HIV疫苗以及通过将抗原性糖引入HIV包膜糖蛋白gp120和gp41的聚糖的模拟物来生产碳水化合物HIV疫苗的方法。

公开(公告)号：US20100183669A1

公开(公告)日：2010-07-22

申请号：US12656550

申请日：2010-02-03

Applicant: Raymond A. Dwek ,  Pauline M. Rudd ,  Gayle E. Ritchie ,  Christopher Scanlan ,  M.D. Max Crispin

Inventor： Raymond A. Dwek ,  Pauline M. Rudd ,  Gayle E. Ritchie ,  Christopher Scanlan ,  M.D. Max Crispin

IPC: A61K39/21

CPC classification number: C12P21/005 ,  A61K39/00 ,  A61K39/12 ,  A61K39/21 ,  C07K14/005 ,  C07K14/70596 ,  C07K16/1063 ,  C07K16/2803 ,  C12N9/16 ,  C12N9/48 ,  C12N2740/16122 ,  C12N2740/16134

Abstract: Methods of producing a carbohydrate HIV vaccine or immunogenic composition are provided. One method comprises expressing a glycoprotein with a modified glycosylation, which facilitates binding of the glycoprotein to the 2G12 antibody. Another method comprises iteratively selecting cells with a high affinity for the 2G12 antibody.

Abstract translation: 提供了生产碳水化合物HIV疫苗或免疫原性组合物的方法。 一种方法包括表达具有修饰的糖基化的糖蛋白，其有助于糖蛋白与2G12抗体的结合。 另一种方法包括迭代地选择对2G12抗体具有高亲和力的细胞。

公开(公告)号：US06546620B1

公开(公告)日：2003-04-15

申请号：US09608357

申请日：2000-06-29

Applicant: Frank Juskey ,  Christopher Scanlan ,  Pat O'Brien

Inventor： Frank Juskey ,  Christopher Scanlan ,  Pat O'Brien

IPC: H05K334

CPC classification number: H01L24/81 ,  H01L21/563 ,  H01L23/3121 ,  H01L24/97 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K3/3436 ,  H05K3/3442 ,  H05K3/3463 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146 ,  Y10T29/49147 ,  Y10T29/53191 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A package includes both a flip chip mounted active chip component and a passive chip component. To form the package, a solder paste is screened onto a passive chip component contact on an upper surface of a substrate. A terminal of the passive chip component is aligned with the solder paste. The solder paste is melted to form a solder joint between the passive chip component contact and the terminal. Solder flux residue from the solder paste is removed. A solder bump is formed on a bond pad of an active chip component. The solder bump is aligned with an active chip component contact on the upper surface of the substrate. The solder bump is melted to form a bump between the active chip component contact and the bond pad, wherein the solder joint does not melt during the melting of the solder bump.

Abstract translation: 封装包括倒装芯片安装的有源芯片组件和无源芯片组件。 为了形成封装，将焊膏在基板的上表面上被屏蔽到无源芯片元件触点上。 无源芯片组件的端子与焊膏对齐。 焊膏熔化，形成无源芯片元件触点与端子之间的焊点。 去除焊膏中的焊剂残留物。 在有源芯片部件的焊盘上形成焊料凸块。 焊料凸块与衬底的上表面上的有源芯片部件接触对准。 焊料凸起熔化以在有源芯片部件接触件和接合焊盘之间形成凸块，其中在焊料凸块的熔化期间焊料接头不熔化。

公开(公告)号：US06356453B1

公开(公告)日：2002-03-12

申请号：US09608678

申请日：2000-06-29

Applicant: Frank Juskey ,  Christopher Scanlan ,  Pat O'Brien

Inventor： Frank Juskey ,  Christopher Scanlan ,  Pat O'Brien

IPC: H05K706

CPC classification number: H01L24/97 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/351 ,  H05K3/284 ,  H05K3/3463 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A package includes both a flip chip mounted active Chip component and a passive chip component. The flip chip bumps between the bond pads of the active chip component and the substrate are low impedance. Further, by mounting the active chip component as a flip chip, the area on the substrate occupied by the active chip component is approximately equal to the area of the active chip component.

Abstract translation: 封装包括倒装芯片安装的有源芯片组件和无源芯片组件。 有源芯片部件和基板的接合焊盘之间的倒装芯片凸起是低阻抗。 此外，通过将有源芯片部件安装为倒装芯片，由有源芯片部件占据的基板上的面积近似等于有源芯片部件的面积。