公开(公告)号：US20050029585A1

公开(公告)日：2005-02-10

申请号：US10633824

申请日：2003-08-04

Applicant: Donald He ,  Ritu Sodhi ,  Davide Chiola

Inventor： Donald He ,  Ritu Sodhi ,  Davide Chiola

IPC: H01L29/872 ,  H01L21/329 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8248 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/088 ,  H01L29/40 ,  H01L29/423 ,  H01L29/45 ,  H01L29/47 ,  H01L29/76 ,  H01L29/78

CPC classification number: H01L29/7813 ,  H01L27/0629 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/8725

Abstract: A semiconductor device including a schottky device and a trench type semiconductor switching device such as a MOSFET formed in a common die.

Abstract translation: 一种半导体器件，包括肖特基器件和沟槽型半导体开关器件，例如形成在公共管芯中的MOSFET。

公开(公告)号：US06846729B2

公开(公告)日：2005-01-25

申请号：US10254112

申请日：2002-09-25

Applicant: Kohji Andoh ,  Davide Chiola ,  Daniel M. Kinzer

Inventor： Kohji Andoh ,  Davide Chiola ,  Daniel M. Kinzer

IPC: H01L27/08 ,  H01L21/425

CPC classification number: H01L27/0814 ,  H01L29/66143 ,  H01L29/8725

Abstract: A Schottky diode is adjusted by implanting an implant species by way of a titanium silicide Schottky contact and driving the implant species into the underlying silicon substrate by a rapid anneal. The implant is at a low energy, (e.g. about 10 keV) and at a low dose (e.g. less than about 9E12 atoms per cm2) such that the barrier height is slightly increased and the leakage current reduced without forming pn junction and retaining the peak boron concentration in the titanium silicide layer.

Abstract translation: 通过用硅化钛肖特基接触注入植入物种并通过快速退火将植入物种驱动到下面的硅衬底中来调节肖特基二极管。 植入物处于低能量（例如约10keV）和低剂量（例如小于约9E12原子/ cm 2），使得势垒高度略微增加，并且漏电流减小而不形成pn结，并且 保留钛硅化物层中的峰值硼浓度。

公开(公告)号：US08003456B2

公开(公告)日：2011-08-23

申请号：US12145808

申请日：2008-06-25

Applicant: Davide Chiola ,  Carsten Schaeffer

Inventor： Davide Chiola ,  Carsten Schaeffer

IPC: H01L21/8238

CPC classification number: H01L29/7397 ,  H01L29/0623 ,  H01L29/0834 ,  H01L29/66348

Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.

Abstract translation: 提出了半导体元件的制造方法。 该方法包括提供具有第一表面的半导体本体; 在所述第一表面上形成掩模，其中所述掩模具有用于限定沟槽的相应位置的开口; 使用掩模在半导体本体中产生沟槽，其中台面结构保留在相邻的沟槽之间; 使用掩模将第一导电类型的第一掺杂剂引入沟槽的底部; 进行第一热步骤; 将与第一导电类型互补的第二导电类型的第二掺杂剂至少引入到沟槽的底部; 并进行第二热步骤。

公开(公告)号：US07973381B2

公开(公告)日：2011-07-05

申请号：US10936162

申请日：2004-09-08

Applicant: Davide Chiola

Inventor： Davide Chiola

IPC: H01L29/66

CPC classification number: H01L29/8725 ,  H01L29/0661 ,  H01L29/407 ,  H01L29/66143 ,  H01L29/872

Abstract: A schottky diode of the trench variety which includes a trench termination having a thick insulation layer that is thicker than the insulation layer inside the trenches in its active region.

Abstract translation: 沟槽品种的肖特基二极管，其包括具有比其活性区域中的沟槽内的绝缘层更厚的厚绝缘层的沟槽终端。

公开(公告)号：US20080087896A1

公开(公告)日：2008-04-17

申请号：US11974103

申请日：2007-10-11

Applicant: Davide Chiola

Inventor： Davide Chiola

IPC: H01L31/00 ,  H01L29/00 ,  H01L31/07 ,  H01L31/108

CPC classification number: H01L29/8725 ,  H01L27/0814 ,  H01L29/0661 ,  H01L29/407 ,  H01L29/66143 ,  H01L29/872 ,  Y10S438/963

Abstract: A fabrication process for a trench Schottky diode with differential oxide thickness within the trenches includes forming a first nitride layer on a substrate surface and subsequently forming a plurality of trenches in the substrate including, possibly, a termination trench. Following a sacrificial oxide layer formation and removal, sidewall and bottom surfaces of the trenches are oxidized. A second nitride layer is then applied to the substrate and etched such that the second nitride layer covers the oxide layer on the trench sidewalls but exposes the oxide layer on the trench bottom surfaces. The trench bottom surfaces are then re-oxidized and the remaining second nitride layer then removed from the sidewalls, resulting in an oxide layer of varying thickness being formed on the sidewall and bottom surfaces of each trench. The trenches are then filled with a P type polysilicon, the first nitride layer removed, and a Schottky barrier metal applied to the substrate surface.

Abstract translation: 在沟槽内具有差的氧化物厚度的沟槽肖特基二极管的制造方法包括在衬底表面上形成第一氮化物层，并且随后在衬底中形成多个沟槽，包括可能的端接沟槽。 在牺牲氧化层形成和去除之后，沟槽的侧壁和底表面被氧化。 然后将第二氮化物层施加到衬底并被蚀刻，使得第二氮化物层覆盖沟槽侧壁上的氧化物层，但是暴露出沟槽底表面上的氧化物层。 然后，沟槽底表面被再次氧化，然后从侧壁去除剩余的第二氮化物层，导致在每个沟槽的侧壁和底表面上形成不同厚度的氧化物层。 然后用P型多晶硅，去除第一氮化物层和施加到衬底表面上的肖特基势垒金属填充沟槽。

公开(公告)号：US20060035422A1

公开(公告)日：2006-02-16

申请号：US11255745

申请日：2005-10-21

Applicant: Donald He ,  Ritu Sodhi ,  Davide Chiola

Inventor： Donald He ,  Ritu Sodhi ,  Davide Chiola

IPC: H01L21/338

CPC classification number: H01L29/7813 ,  H01L27/0629 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/8725

Abstract: A semiconductor device including a schottky device and a trench type semiconductor switching device such as a MOSFET formed in a common die.

Abstract translation: 一种半导体器件，包括肖特基器件和沟槽型半导体开关器件，例如形成在公共管芯中的MOSFET。

公开(公告)号：US06977208B2

公开(公告)日：2005-12-20

申请号：US10766460

申请日：2004-01-27

Applicant: Davide Chiola

Inventor： Davide Chiola

IPC: H01L21/329 ,  H01L21/763 ,  H01L27/08 ,  H01L27/095 ,  H01L29/06 ,  H01L29/872 ,  H01L21/28

CPC classification number: H01L29/8725 ,  H01L21/763 ,  H01L27/0814 ,  H01L27/095 ,  H01L29/0692 ,  H01L29/66143 ,  H01L29/872

Abstract: A trench schottky diode which includes a thin insulation layer on the sidewalls of its trenches and a relatively thicker insulation layer at the bottoms of its trenches.

Abstract translation: 沟槽肖特基二极管，其在其沟槽的侧壁上包括薄的绝缘层，在其沟槽的底部包括相对较厚的绝缘层。

公开(公告)号：US20050161759A1

公开(公告)日：2005-07-28

申请号：US10766466

申请日：2004-01-27

Applicant: Davide Chiola ,  Kohji Andoh ,  Silvestro Fimiani

Inventor： Davide Chiola ,  Kohji Andoh ,  Silvestro Fimiani

IPC: H01L27/08 ,  H01L29/868 ,  H01L27/095

CPC classification number: H01L29/872 ,  H01L27/0814 ,  H01L29/0684 ,  H01L29/868

Abstract: A Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper oppositely doped diffusion region.

Abstract translation: 合并的P-i-N肖特基器件，其中相反掺杂的扩散延伸到深度并且已经间隔开，使得该器件能够吸收与具有相对更深的相反掺杂扩散区域的快速恢复外延二极管相当的反向雪崩能量。

公开(公告)号：US06855593B2

公开(公告)日：2005-02-15

申请号：US10193783

申请日：2002-07-11

Applicant: Kohji Andoh ,  Davide Chiola

Inventor： Kohji Andoh ,  Davide Chiola

IPC: H01L21/329 ,  H01L27/08 ,  H01L29/40 ,  H01L29/47 ,  H01L29/872 ,  H01L21/8234

CPC classification number: H01L29/407 ,  H01L27/0814 ,  H01L29/66143 ,  H01L29/8725 ,  Y10S438/963

Abstract: A fabrication process for a Schottky barrier structure includes forming a nitride layer directly on a surface of an epitaxial (“epi”) layer and subsequently forming a plurality of trenches in the epi layer. The interior walls of the trenches are then deposited with a final oxide layer without forming a sacrificial oxide layer to avoid formation of a beak bird at the tops of the interior trench walls. A termination trench is etched in the same process step for forming the plurality of trenches in the active area.

Abstract translation: 用于肖特基势垒结构的制造方法包括在外延（“epi”）层的表面上直接形成氮化物层，随后在外延层中形成多个沟槽。 然后将沟槽的内壁沉积有最终的氧化物层，而不形成牺牲氧化物层，以避免在内部沟槽壁的顶部形成喙鸟。 在用于在有源区域中形成多个沟槽的相同工艺步骤中蚀刻端接沟槽。

公开(公告)号：US20110233728A1

公开(公告)日：2011-09-29

申请号：US13156037

申请日：2011-06-08

Applicant: Davide CHIOLA ,  Carsten SCHAEFFER

Inventor： Davide CHIOLA ,  Carsten SCHAEFFER

IPC: H01L29/06

CPC classification number: H01L29/7397 ,  H01L29/0623 ,  H01L29/0834 ,  H01L29/66348

Abstract: A method for producing a semiconductor component is proposed. The method includes providing a semiconductor body having a first surface; forming a mask on the first surface, wherein the mask has openings for defining respective positions of trenches; producing the trenches in the semiconductor body using the mask, wherein mesa structures remain between adjacent trenches; introducing a first dopant of a first conduction type using the mask into the bottoms of the trenches; carrying out a first thermal step; introducing a second dopant of a second conduction type, which is complementary to the first conduction type, at least into the bottoms of the trenches; and carrying out a second thermal step.

Abstract translation: 提出了半导体元件的制造方法。 该方法包括提供具有第一表面的半导体本体; 在所述第一表面上形成掩模，其中所述掩模具有用于限定沟槽的相应位置的开口; 使用掩模在半导体本体中产生沟槽，其中台面结构保留在相邻的沟槽之间; 使用掩模将第一导电类型的第一掺杂剂引入沟槽的底部; 进行第一热步骤; 将与第一导电类型互补的第二导电类型的第二掺杂剂至少引入到沟槽的底部; 并进行第二热步骤。