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    Merged P-i-N Schottky structure
    2.
    发明授权
    Merged P-i-N Schottky structure 有权
    合并的P-i-N肖特基结构

    公开(公告)号：US07858456B2

    公开(公告)日：2010-12-28

    申请号：US11402039

    申请日：2006-04-11

    Applicant: Davide Chiola ,  Kohji Andoh ,  Silvestro Fimiani

    Inventor： Davide Chiola ,  Kohji Andoh ,  Silvestro Fimiani

    IPC: H01L21/338

    CPC classification number: H01L29/872 ,  H01L27/0814 ,  H01L29/0684 ,  H01L29/868

    Abstract: Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper oppositely doped diffusion region.

    Abstract translation: 合并的P-i-N肖特基器件，其中相反掺杂的扩散延伸到深度并且已经间隔开，使得该器件能够吸收与具有相对更深的相反掺杂扩散区域的快速恢复外延二极管相当的反向雪崩能量。

    Trench Schottky barrier diode
    5.
    发明授权
    Trench Schottky barrier diode 有权
    沟槽肖特基势垒二极管

    公开(公告)号：US06855593B2

    公开(公告)日：2005-02-15

    申请号：US10193783

    申请日：2002-07-11

    Applicant: Kohji Andoh ,  Davide Chiola

    Inventor： Kohji Andoh ,  Davide Chiola

    IPC: H01L21/329 ,  H01L27/08 ,  H01L29/40 ,  H01L29/47 ,  H01L29/872 ,  H01L21/8234

    CPC classification number: H01L29/407 ,  H01L27/0814 ,  H01L29/66143 ,  H01L29/8725 ,  Y10S438/963

    Abstract: A fabrication process for a Schottky barrier structure includes forming a nitride layer directly on a surface of an epitaxial (“epi”) layer and subsequently forming a plurality of trenches in the epi layer. The interior walls of the trenches are then deposited with a final oxide layer without forming a sacrificial oxide layer to avoid formation of a beak bird at the tops of the interior trench walls. A termination trench is etched in the same process step for forming the plurality of trenches in the active area.

    Abstract translation: 用于肖特基势垒结构的制造方法包括在外延（“epi”）层的表面上直接形成氮化物层，随后在外延层中形成多个沟槽。 然后将沟槽的内壁沉积有最终的氧化物层，而不形成牺牲氧化物层，以避免在内部沟槽壁的顶部形成喙鸟。 在用于在有源区域中形成多个沟槽的相同工艺步骤中蚀刻端接沟槽。

    Process for counter doping N-type silicon in Schottky device Ti silicide barrier
    7.
    发明授权
    Process for counter doping N-type silicon in Schottky device Ti silicide barrier 有权
    肖特基元件Ti硅化物屏蔽中的反相掺杂N型硅的工艺

    公开(公告)号：US06846729B2

    公开(公告)日：2005-01-25

    申请号：US10254112

    申请日：2002-09-25

    Applicant: Kohji Andoh ,  Davide Chiola ,  Daniel M. Kinzer

    Inventor： Kohji Andoh ,  Davide Chiola ,  Daniel M. Kinzer

    IPC: H01L27/08 ,  H01L21/425

    CPC classification number: H01L27/0814 ,  H01L29/66143 ,  H01L29/8725

    Abstract: A Schottky diode is adjusted by implanting an implant species by way of a titanium silicide Schottky contact and driving the implant species into the underlying silicon substrate by a rapid anneal. The implant is at a low energy, (e.g. about 10 keV) and at a low dose (e.g. less than about 9E12 atoms per cm2) such that the barrier height is slightly increased and the leakage current reduced without forming pn junction and retaining the peak boron concentration in the titanium silicide layer.

    Abstract translation: 通过用硅化钛肖特基接触注入植入物种并通过快速退火将植入物种驱动到下面的硅衬底中来调节肖特基二极管。 植入物处于低能量（例如约10keV）和低剂量（例如小于约9E12原子/ cm 2），使得势垒高度略微增加，并且漏电流减小而不形成pn结，并且 保留钛硅化物层中的峰值硼浓度。

    Process for preparation of semiconductor wafer surface
    8.
    发明授权
    Process for preparation of semiconductor wafer surface 有权
    制备半导体晶片表面的工艺

    公开(公告)号：US06991943B2

    公开(公告)日：2006-01-31

    申请号：US10728482

    申请日：2003-12-04

    Applicant: Kohji Andoh ,  Davide Chiola

    Inventor： Kohji Andoh ,  Davide Chiola

    IPC: H01L21/00

    CPC classification number: H01L22/20

    Abstract: A method for adjusting the resistivity in the surface of a semiconductive substrate including selective measurement and counter-doping of areas on a major surface of a semiconductive substrate.

    Abstract translation: 一种用于调整半导体衬底的表面中的电阻率的方法，包括半导体衬底的主表面上的区域的选择性测量和反掺杂。

    Merged P-i-N Schottky structure
    9.
    发明申请
    Merged P-i-N Schottky structure 有权
    合并的P-i-N肖特基结构

    公开(公告)号：US20060189107A1

    公开(公告)日：2006-08-24

    申请号：US11402039

    申请日：2006-04-11

    Applicant: Davide Chiola ,  Kohji Andoh ,  Silvestro Fimiani

    Inventor： Davide Chiola ,  Kohji Andoh ,  Silvestro Fimiani

    IPC: H01L21/28

    CPC classification number: H01L29/872 ,  H01L27/0814 ,  H01L29/0684 ,  H01L29/868

    Abstract: Merged P-i-N Schottky device in which the oppositely doped diffusions extend to a depth and have been spaced apart such that the device is capable of absorbing a reverse avalanche energy comparable to a Fast Recovery Epitaxial Diode having a comparatively deeper oppositely doped diffusion region.

    Abstract translation: 合并的P-i-N肖特基器件，其中相反掺杂的扩散延伸到深度并且已经间隔开，使得该器件能够吸收与具有相对更深的相对掺杂的扩散区域的快速恢复外延二极管相当的反向雪崩能量。

    Fast recovery diode with a single large area p/n junction
    10.
    发明授权
    Fast recovery diode with a single large area p/n junction 有权
    具有单个大面积p / n结的快速恢复二极管

    公开(公告)号：US07091572B2

    公开(公告)日：2006-08-15

    申请号：US11233760

    申请日：2005-09-23

    Applicant: Kohji Andoh ,  Silvestro Fimiani ,  Fabrizio Rue Redda ,  Davide Chiola

    Inventor： Kohji Andoh ,  Silvestro Fimiani ,  Fabrizio Rue Redda ,  Davide Chiola

    IPC: H01L29/861 ,  H01L31/107

    CPC classification number: H01L29/402 ,  H01L29/32 ,  H01L29/66136 ,  H01L29/8611

    Abstract: A fast recovery diode has a single large area P/N junction surrounded by a termination region. The anode contact in contact with the central active area extends over the inner periphery of an oxide termination ring and an EQR metal ring extends over the outer periphery of the oxide termination ring. Platinum atoms are diffused into the back surface of the device. A three mask process is described. An amorphous silicon layer is added in a four mask process, and a plurality of spaced guard rings are added in a five mask process.

    Abstract translation: 快速恢复二极管具有由终端区域包围的单个大面积P / N结。 与中心有源区接触的阳极触点在氧化物终止环的内周边延伸，并且EQR金属环在氧化物终止环的外周延伸。 铂原子扩散到器件的后表面。 描述三个掩模过程。 在四掩模工艺中添加非晶硅层，并且在五个掩模工艺中添加多个间隔保护环。

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