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    Semiconductor device having high-voltage transistor
    11.
    发明授权
    Semiconductor device having high-voltage transistor 有权
    具有高压晶体管的半导体器件

    公开(公告)号：US09330739B2

    公开(公告)日：2016-05-03

    申请号：US13602887

    申请日：2012-09-04

    Applicant: Dong Hwan Lee

    Inventor： Dong Hwan Lee

    IPC: G11C16/04 ,  G11C7/00 ,  G11C11/00 ,  G11C7/18 ,  H01L27/02 ,  H01L27/105 ,  H01L27/108

    CPC classification number: G11C7/18 ,  G11C16/0483 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10885

    Abstract: A semiconductor device includes a memory cell array having a plurality of memory cells respectively coupled to first and second bit lines, page buffers, and a bit line selection circuit including a plurality of selection circuit blocks configured to couple the first or second bit lines to the page buffers. A pair of the first and second bit lines is disposed in each of the plurality of selection circuits so that first bit lines of adjacent selection circuit blocks face each other, or second bit lines of adjacent selection circuit blocks face each other.

    Abstract translation: 半导体器件包括具有分别耦合到第一和第二位线的多个存储器单元，页面缓冲器以及包括多个选择电路块的位线选择电路的存储单元阵列，所述多个选择电路块被配置为将第一或第二位线耦合到 页面缓冲区。 一对第一位线和第二位线设置在多个选择电路的每一个中，使得相邻选择电路块的第一位线彼此面对，或者相邻选择电路块的第二位线彼此面对。

    SEMICONDUCTOR DEVICE HAVING HIGH-VOLTAGE TRANSISTOR
    13.
    发明申请
    SEMICONDUCTOR DEVICE HAVING HIGH-VOLTAGE TRANSISTOR 有权
    具有高压晶体管的半导体器件

    公开(公告)号：US20130163365A1

    公开(公告)日：2013-06-27

    申请号：US13602887

    申请日：2012-09-04

    Applicant: Dong Hwan LEE

    Inventor： Dong Hwan LEE

    IPC: G11C8/00

    CPC classification number: G11C7/18 ,  G11C16/0483 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/10885

    Abstract: A semiconductor device includes a memory cell array having a plurality of memory cells respectively coupled to first and second bit lines, page buffers, and a bit line selection circuit including a plurality of selection circuit blocks configured to couple the first or second bit lines to the page buffers. A pair of the first and second bit lines is disposed in each of the plurality of selection circuits so that first bit lines of adjacent selection circuit blocks face each other, or second bit lines of adjacent selection circuit blocks face each other.

    Abstract translation: 半导体器件包括具有分别耦合到第一和第二位线的多个存储器单元，页面缓冲器以及包括多个选择电路块的位线选择电路的存储单元阵列，所述多个选择电路块被配置为将第一或第二位线耦合到 页面缓冲区。 一对第一位线和第二位线设置在多个选择电路的每一个中，使得相邻选择电路块的第一位线彼此面对，或者相邻选择电路块的第二位线彼此面对。

    Liquid crystal driving device and driving method thereof
    14.
    发明授权
    Liquid crystal driving device and driving method thereof 有权
    液晶驱动装置及其驱动方法

    公开(公告)号：US08334830B2

    公开(公告)日：2012-12-18

    申请号：US13179680

    申请日：2011-07-11

    Applicant: Dong Hwan Lee ,  Tae Hyuk Kwon

    Inventor： Dong Hwan Lee ,  Tae Hyuk Kwon

    IPC: G09G3/36

    CPC classification number: G09G3/3696 ,  G09G3/3648 ,  G09G2320/0223

    Abstract: Disclosed is a liquid crystal driving device, which is without a gate PCB, having improved uniformity of screen, and a driving method thereof. The liquid crystal driving device comprises: a sequence recognition means for recognizing sequence of a pertinent gate driver IC by a pulse width of a vertical start signal inputted in synchronization with a vertical synchronous signal, and generating a Carry signal and location data of the pertinent gate driver IC; and gate-off voltage generation means for receiving a first gate-off voltage and the location data of the pertinent gate driver IC, and outputting a second gate-off voltage which is generated by subtracting a voltage attenuation quantity corresponding to the location data of the gate driver IC from the first gate-off voltage.

    Abstract translation: 公开了一种没有栅极PCB的具有改进的屏幕均匀性的液晶驱动装置及其驱动方法。 液晶驱动装置包括：序列识别装置，用于通过与垂直同步信号同步输入的垂直起始信号的脉冲宽度来识别相关栅极驱动器IC的序列，并产生相应栅极的进位信号和位置数据 驱动IC; 以及栅极截止电压产生装置，用于接收第一栅极截止电压和相关栅极驱动器IC的位置数据，并输出第二栅极截止电压，该第二栅极截止电压是通过减去与所述栅极驱动器IC的位置数据相对应的电压衰减量而产生的 栅极驱动器IC从第一个栅极截止电压。

    Apparatus and method of estimating inductance of permanent magnet synchronous motor
    15.
    发明申请
    Apparatus and method of estimating inductance of permanent magnet synchronous motor 有权
    估计永磁同步电机电感的装置及方法

    公开(公告)号：US20120194113A1

    公开(公告)日：2012-08-02

    申请号：US13137309

    申请日：2011-08-04

    Applicant: Dong Hwan Lee ,  Young Jae Park ,  Yong Soon Park ,  Seung Ki Sul

    Inventor： Dong Hwan Lee ,  Young Jae Park ,  Yong Soon Park ,  Seung Ki Sul

    IPC: H02P6/18

    CPC classification number: H02P6/18

    Abstract: A method of estimating inductance of a permanent magnet synchronous motor (PMSM) includes injecting a signal having a frequency differing from an operating frequency of the PMSM into the PMSM during sensorless operation, sensing magnitudes of current responses to the injected signal, and estimating an inductance value at which the magnitude of the sensed current response is minimal to be an actual inductance value of the PMSM, thereby estimating inductance used in the PMSM regardless of position estimation error of the PMSM and thus more accurately and reliably estimating inductance of the PMSM.

    Abstract translation: 估计永磁同步电动机（PMSM）的电感的方法包括在无传感器运行期间将具有与PMSM的工作频率不同的频率的信号注入到PMSM中，感测对所注入的信号的电流响应的大小，以及估计电感 检测到的电流响应的大小最小的值是PMSM的实际电感值，从而估计在PMSM中使用的电感，而不管PMSM的位置估计误差如何，并且因此更准确和可靠地估计PMSM的电感。

    PRINTED CIRCUIT BOARD AND A METHOD OF MANUFACTURING THE SAME
    16.
    发明申请
    PRINTED CIRCUIT BOARD AND A METHOD OF MANUFACTURING THE SAME 审中-公开
    印刷电路板及其制造方法

    公开(公告)号：US20110297427A1

    公开(公告)日：2011-12-08

    申请号：US13151108

    申请日：2011-06-01

    Applicant: Dong Hwan Lee ,  Dae Hyung You ,  Sang Hyuk Son

    Inventor： Dong Hwan Lee ,  Dae Hyung You ,  Sang Hyuk Son

    IPC: H05K7/20 ,  H05K3/00

    CPC classification number: H05K3/4602 ,  H05K3/4644 ,  H05K2201/09345 ,  H05K2203/175 ,  Y10T29/49124

    Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes a metal layer divided into a plurality of regions; a build-up layer formed on at least one surface of the metal layer; and a penetrating part penetrating through the metal layer including the build-up layer and electrically separating each of the plurality of regions of the metal layer. The metal layer is configured of the plurality of regions, the ground layers and the power layers that have different functions, thereby making it possible to be thin, and the plurality of regions of the metal layer are connected through a bridge and are then penetrated through by the penetrating part, thereby making it possible to easily manufacture the printed circuit board.

    Abstract translation: 这里公开了一种印刷电路板及其制造方法。 印刷电路板包括划分成多个区域的金属层; 形成在所述金属层的至少一个表面上的堆积层; 以及穿透包括所述积聚层的所述金属层并且电分离所述金属层的所述多个区域中的每一个的穿透部分。 金属层由具有不同功能的多个区域，接地层和功率层构成，从而可以变薄，金属层的多个区域通过桥连接，然后穿过 通过穿透部分，从而可以容易地制造印刷电路板。

    METHOD AND APPARATUS FOR COMPENSATING FOR DEFECT OF STORAGE MEDIUM
    18.
    发明申请
    METHOD AND APPARATUS FOR COMPENSATING FOR DEFECT OF STORAGE MEDIUM 有权
    用于补偿存储介质缺陷的方法和装置

    公开(公告)号：US20110103204A1

    公开(公告)日：2011-05-05

    申请号：US12718478

    申请日：2010-03-05

    Applicant: Dong-hwan LEE ,  Young-jae PARK

    Inventor： Dong-hwan LEE ,  Young-jae PARK

    IPC: G11B7/00

    CPC classification number: G11B7/00375 ,  G11B7/0948

    Abstract: An apparatus for compensating for a defect of a storage medium of an optical driving includes a memory to store sample values of a servo driving signal during at least one track sampled by a first signal and cycle information about the first signal; a servo driving signal estimator to estimate a servo driving signal during at least one next track using the sample values, the cycle information about the first signal, and cycle information based on a second signal; and a transmitter to transmit the servo driving signal estimated by the servo driving signal estimator to a servo driver of the optical driving device during a defect section of the storage medium; wherein the first signal is synchronized with a radial direction of the storage medium; and the second signal has a frequency higher than the first signal.

    Abstract translation: 用于补偿光学驱动的存储介质的缺陷的装置包括存储器，用于存储在由第一信号采样的至少一个轨道期间的伺服驱动信号的采样值，以及关于第一信号的周期信息; 伺服驱动信号估计器，用于使用采样值，关于第一信号的周期信息和基于第二信号的周期信息来估计在至少一个下一个轨道期间的伺服驱动信号; 以及发送器，用于在所述存储介质的缺陷部分期间将由所述伺服驱动信号估计器估计的伺服驱动信号发送到所述光驱动装置的伺服驱动器; 其中所述第一信号与所述存储介质的径向方向同步; 并且第二信号具有高于第一信号的频率。

    Multilayer LC composite component
    19.
    发明授权
    Multilayer LC composite component 有权
    多层LC复合材料

    公开(公告)号：US07928819B2

    公开(公告)日：2011-04-19

    申请号：US12211331

    申请日：2008-09-16

    Applicant: Dong Hwan Lee ,  Hee Soo Yoon

    Inventor： Dong Hwan Lee ,  Hee Soo Yoon

    IPC: H03H7/01 ,  H01P1/203

    CPC classification number: H03H7/0115 ,  H03H7/1766 ,  H03H7/1775 ,  H03H2001/0085

    Abstract: There is provided a band pass filter including: a stacked body having a stacked structure of a plurality of dielectric sheets; and a plurality of elements provided in the stacked body, the plurality of elements including: a first capacitor electrode; a second capacitor electrode partially overlapping the first capacitor electrode to form capacitive coupling; a third capacitor electrode connected to the second capacitor electrode; a first inductor pattern having one end connected to the first capacitor electrode and the other end connected to a ground; a second inductor pattern having one end connected to the third capacitor electrode and the other end connected to the ground; an input terminal provided at one region of the first inductor pattern; and an output terminal provided at one region of the second inductor pattern.

    Abstract translation: 提供了一种带通滤波器，包括：堆叠体，其具有多个电介质层的堆叠结构; 以及设置在所述层叠体中的多个元件，所述多个元件包括：第一电容器电极; 第二电容器电极部分地与第一电容器电极重叠以形成电容耦合; 连接到第二电容器电极的第三电容器电极; 第一电感器图案，其一端连接到第一电容器电极，另一端连接到地; 第二电感器图案，其一端连接到第三电容器电极，另一端连接到地; 输入端子，设置在所述第一电感器图案的一个区域; 以及设置在第二电感器图案的一个区域处的输出端子。

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