公开(公告)号：US06337260B1

公开(公告)日：2002-01-08

申请号：US09667602

申请日：2000-09-22

申请人： Emi Ishida

发明人： Emi Ishida

IPC分类号： H01L21322

CPC分类号： H01L21/31155 ,  H01L21/26513 ,  H01L21/2652 ,  H01L21/26526

摘要： Transient enhanced diffusion (TED) of ion implanted dopant impurities within a silicon semiconductor substrate is eliminated or substantially reduced by displacing “knocked-on” oxygen atoms from an overlying oxygen-containing layer into the substrate by ion implantation. The “knocked-on” oxygen atoms getter silicon interstitial atoms generated within the substrate by dopant implantation, which are responsible for TED.

摘要翻译： 通过离子注入将“敲入”的氧原子从上覆的含氧层置换到衬底中，消除或基本上减少硅半导体衬底内离子注入的掺杂杂质的瞬态增强扩散（TED）。 “敲入”氧原子通过掺杂剂注入在衬底内产生的硅间隙原子，这是负责TED的。

公开(公告)号：US06190980B1

公开(公告)日：2001-02-20

申请号：US09150874

申请日：1998-09-10

申请人： Bin Yu ,  Ming-Ren Lin ,  Emi Ishida

发明人： Bin Yu ,  Ming-Ren Lin ,  Emi Ishida

IPC分类号： H01L21336

CPC分类号： H01L29/66583 ,  H01L21/26586 ,  H01L29/66492 ,  H01L29/66537

摘要： A method of performing tilted implantation for pocket, halo and source/drain extensions in ULSI dense structures. The method overcomes the process limit, due to shadowing effects, in dense structures, of using large angle tilted implant techniques in ULSI circuits. A gate opening in an oxide layer is defined and partially filled by insertion of nitride spacers to define an actual gate window opening. The small angle tilted implant technique has the equivalent doping effect of large angle tilted implants, and circumvents the maximum angle limit (&thgr;MAX) that occurs in the large angle implant method. The small angle tilted implant technique also automatically provides self alignment of the pocket/halo/extension implant to the gate of the device.

摘要翻译： 在ULSI致密结构中进行凹槽，晕圈和源极/漏极延伸的倾斜注入的方法。 该方法克服了在密集结构中的阴影效应，在ULSI电路中使用大角度倾斜植入技术的过程极限。 通过插入氮化物间隔物限定氧化层中的开口，并且通过插入氮化物间隔物来部分地填充以限定实际的门窗开口。 小角度倾斜植入技术具有大角度倾斜植入物的等效掺杂效应，并避开了大角度植入法中发生的最大角度限制（thetaMAX）。 小角度倾斜植入技术还自动提供袋/晕/延伸植入物到装置的门的自对准。

公开(公告)号：US06180468B2

公开(公告)日：2001-01-30

申请号：US09177774

申请日：1998-10-23

申请人： Bin Yu ,  Emi Ishida ,  Scott Luning ,  Timothy Thurgate

发明人： Bin Yu ,  Emi Ishida ,  Scott Luning ,  Timothy Thurgate

IPC分类号： H01L21336

CPC分类号： H01L29/66537 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/66545 ,  H01L29/6659

摘要： An ultra-low thermal budget process is provided for channel implant by using a reverse process sequence where a conventional MOS transistor is formed without the channel implant. The originally deposited polysilicon gate is removed, a nitride film deposition and etch is used to form a nitride spacer with a predetermined configuration, and a self-aligned channel implant is performed. After the channel implantation, anneal and super-retrograded doping, the nitride spacer and the gate oxide are removed for subsequent regrowth of a second gate oxide and a polysilicon deposition to form a second polysilicon gate.

摘要翻译： 通过使用反向工艺流程为通道注入提供超低热量预算过程，其中形成常规MOS晶体管而不需要沟道注入。 去除原来沉积的多晶硅栅极，使用氮化物膜沉积和蚀刻来形成具有预定配置的氮化物间隔物，并且执行自对准沟道注入。 在通道注入，退火和超退火掺杂之后，去除氮化物间隔物和栅极氧化物，以便随后的第二栅极氧化物的再生长和多晶硅沉积形成第二多晶硅栅极。

公开(公告)号：US6117719A

公开(公告)日：2000-09-12

申请号：US993060

申请日：1997-12-18

申请人： Scott Luning ,  Emi Ishida

发明人： Scott Luning ,  Emi Ishida

IPC分类号： H01L21/225 ,  H01L21/336 ,  H01L29/10 ,  H01L21/8238

CPC分类号： H01L29/66492 ,  H01L21/2255 ,  H01L29/1045 ,  H01L29/6659

摘要： Impurities are formed in the active region of a semiconductor substrate by diffusion from a gate electrode sidewall spacer. A gate electrode is formed on a semiconductor substrate with a gate dielectric layer therebetween. Sidewall spacers are formed on the side surfaces of the gate electrode. Dopant atoms are subsequently introduce to transform the spacers into solid dopant sources. Dopant atoms are diffused from the spacers into the semiconductor substrate to form first doped regions.

摘要翻译： 通过从栅电极侧壁间隔物的扩散，在半导体衬底的有源区中形成杂质。 在半导体衬底上形成有栅电介质层的栅电极。 侧壁间隔物形成在栅电极的侧表面上。 随后引入掺杂原子以将间隔物转化为固体掺杂剂源。 掺杂原子从间隔物扩散到半导体衬底中以形成第一掺杂区域。

公开(公告)号：US6100171A

公开(公告)日：2000-08-08

申请号：US33784

申请日：1998-03-03

申请人： Emi Ishida

发明人： Emi Ishida

IPC分类号： H01L21/268 ,  H01L21/28 ,  H01L21/336 ,  H01L21/42

CPC分类号： H01L29/6659 ,  H01L21/268 ,  H01L21/28035

摘要： In one embodiment, the present invention relates to a method of removing fluorine from a gate conductor involving the steps of providing a semiconductor device containing a substrate, a gate insulator layer overlying a portion of the substrate, a gate conductor containing fluorine overlying the gate insulator layer, and a source and a drain region adjacent the gate insulator layer; and laser annealing the semiconductor device at an energy level sufficient to melt at least a portion of the gate conductor thereby inducing the removal of fluorine from the gate conductor. In another embodiment, the present invention relates to a method of making a transistor involving the steps of forming a gate conductor overlying a gate insulator layer, wherein the gate conductor and the gate insulator layer overlie a portion of a substrate, doping the substrate and gate conductor with BF.sub.2.sup.+ to form in the substrate a source region and a drain region adjacent the gate insulator layer and a channel region between the source and drain regions and under the gate insulator layer; laser annealing the doped gate conductor, the doped source region and the doped drain region at an energy level sufficient to melt at least a portion of the doped gate conductor, thereby removing fluorine from the melted portion of the gate conductor; and subsequently performing an RTA to activate the doped source region and the doped drain region

摘要翻译： 在一个实施例中，本发明涉及一种从栅极导体去除氟的方法，包括以下步骤：提供包含衬底的半导体器件，覆盖衬底的一部分的栅极绝缘体层， 以及与栅极绝缘体层相邻的源极和漏极区域; 以及以足以熔化所述栅极导体的至少一部分的能级激光退火所述半导体器件，从而导致从所述栅极导体去除氟。 在另一个实施例中，本发明涉及一种制造晶体管的方法，该方法包括以下步骤：形成覆盖栅极绝缘体层的栅极导体，其中栅极导体和栅极绝缘体层覆盖在衬底的一部分上，掺杂衬底和栅极 导体与BF2 +在衬底中形成与栅极绝缘体层相邻的源极区域和漏极区域以及源极和漏极区域之间的沟道区域以及栅极绝缘体层下方的沟道区域; 激光退火所述掺杂栅极导体，所述掺杂源极区域和所述掺杂漏极区域处于足以熔化所述掺杂栅极导体的至少一部分的能级，从而从所述栅极导体的熔融部分去除氟; 随后执行RTA以激活掺杂源极区域和掺杂漏极区域

公开(公告)号：US6074937A

公开(公告)日：2000-06-13

申请号：US58897

申请日：1998-04-13

申请人： Shekhar Pramanick ,  Che-Hoo Ng ,  Emi Ishida

发明人： Shekhar Pramanick ,  Che-Hoo Ng ,  Emi Ishida

IPC分类号： H01L21/265 ,  H01L21/336 ,  H01L21/425

CPC分类号： H01L29/6659 ,  H01L21/26506 ,  H01L21/2652

摘要： Lightly doped regions are implanted into an amorphous region in the semiconductor substrate to significantly reduce transient enhanced diffusion upon subsequent activation annealing. A sub-surface non-amorphous region is also formed before activation annealing to substantially eliminate end-of-range defects on crystallization of amorphous region containing the lightly doped implants.

摘要翻译： 将轻掺杂区域注入到半导体衬底中的非晶区域中，以在随后的激活退火时显着减少瞬时增强的扩散。 在激活退火之前还形成亚表面非非晶区域，以基本上消除含有轻掺杂植入物的非晶区域的结晶范围内的范围内缺陷。

公开(公告)号：US5998272A

公开(公告)日：1999-12-07

申请号：US745475

申请日：1996-11-12

申请人： Emi Ishida ,  Scott Luning ,  Dong-Hyuk Ju

发明人： Emi Ishida ,  Scott Luning ,  Dong-Hyuk Ju

IPC分类号： H01L21/223 ,  H01L21/265 ,  H01L21/336

CPC分类号： H01L29/6653 ,  H01L21/223 ,  H01L21/2652 ,  H01L29/665 ,  H01L29/6659

摘要： A process in accordance with the invention minimizes the number of heat steps to which an source-drain extension region is exposed, thus minimizing source-drain extension region diffusion and allowing more precise control of source-drain extension region thickness over conventional processes. In accordance with the invention, spacers are formed abutting the gate and then heavily doped source and drain regions are formed. The gate and source and drain regions are silicided. The spacers are subsequently removed and source-drain extension regions are then formed. In one embodiment of the invention, a laser doping process is used to form the source-drain extension regions.

摘要翻译： 根据本发明的方法使源极 - 漏极延伸区域暴露的加热步骤的数量最小化，从而使源极 - 漏极延伸区域扩散最小化，并且允许比常规工艺更精确地控制源极 - 漏极扩展区域厚度。 根据本发明，形成邻接栅极的间隔物，然后形成重掺杂的源区和漏区。 栅极和源极和漏极区域被硅化。 随后移除间隔物，然后形成源漏扩展区。 在本发明的一个实施例中，使用激光掺杂工艺来形成源极 - 漏极延伸区域。

公开(公告)号：US5966605A

公开(公告)日：1999-10-12

申请号：US966308

申请日：1997-11-07

申请人： Emi Ishida

发明人： Emi Ishida

IPC分类号： H01L21/223 ,  H01L21/225 ,  H01L21/268 ,  H01L21/28 ,  H01L21/336

CPC分类号： H01L29/66575 ,  H01L21/28035 ,  H01L21/223 ,  H01L21/2254 ,  H01L21/268

摘要： A method of forming a transistor includes the steps of forming a gate structure (56) overlying a gate oxide layer (54), wherein the gate structure (56) and gate oxide layer (54) overlie a substrate (50), thereby separating the substrate (50) into a first region (90) and a second region (92) with a channel region therebetween. The method also includes doping the gate structure (56), the first region (90) and the second region (92) and annealing the doped gate structure (56) with a laser anneal, thereby driving the dopant through a substantial depth of the gate structure (56). Lastly, a source region (94) and a drain region (96) are formed in the first region (90) and the second region (92), respectively, wherein the dopant is further driven into the gate structure (56). Consequently, the dopant is driven substantially deeper in the gate structure (56) than in the shallow source region (94) and drain region (96) junctions to allow decoupling of poly depletion from the need for shallow junctions.

摘要翻译： 一种形成晶体管的方法包括以下步骤：形成覆盖栅极氧化物层（54）的栅极结构（56），其中栅极结构（56）和栅极氧化物层（54）覆盖在衬底（50）上， 衬底（50）插入到其间具有沟道区域的第一区域（90）和第二区域（92）中。 该方法还包括掺杂栅极结构（56），第一区域（90）和第二区域（92）并且用激光退火退火掺杂栅极结构（56），从而驱动掺杂剂通过栅极的大的深度 结构（56）。 最后，分别在第一区域（90）和第二区域（92）中形成源极区（94）和漏极区（96），其中掺杂剂进一步被驱动到栅极结构（56）中。 因此，掺杂剂在栅极结构（56）中比在浅源极区（94）和漏极区（96）中接合地被驱动得更深，以允许多余的去耦从需要浅结的位置。

公开(公告)号：US5795627A

公开(公告)日：1998-08-18

申请号：US799236

申请日：1997-02-14

申请人： Sunil Mehta ,  Emi Ishida ,  Xiao-Yu Li

发明人： Sunil Mehta ,  Emi Ishida ,  Xiao-Yu Li

IPC分类号： H01L21/316 ,  H01L21/762 ,  H01L27/115 ,  C23C14/04

CPC分类号： H01L21/76213 ,  H01L21/316 ,  H01L27/115

摘要： A method of forming an oxide enhancing region, such as phosphorus, in a semiconductor substrate with minimal damage is provided. The method includes the steps of forming an oxide enhancing region in the semiconductor substrate to a depth below the semiconductor substrate. A 308 nm excimer laser is then applied to the oxide enhancing region in order to reduce the damage caused by forming the oxide enhancing region. A uniform and reliable oxide layer is then formed on the surface of the substrate over the damage reduced oxide enhancing region.

摘要翻译： 提供了在具有最小损伤的半导体衬底中形成诸如磷的氧化物增强区域的方法。 该方法包括以下步骤：在半导体衬底中形成半导体衬底下方的深度的氧化物增强区。 然后将308nm准分子激光器施加到氧化物增强区域，以便减少由形成氧化物增强区域引起的损伤。 然后在损伤还原氧化物增强区域上的衬底的表面上形成均匀且可靠的氧化物层。

公开(公告)号：US5316969A

公开(公告)日：1994-05-31

申请号：US993788

申请日：1992-12-21

申请人： Emi Ishida ,  Thomas W. Sigmon ,  William T. Lynch

发明人： Emi Ishida ,  Thomas W. Sigmon ,  William T. Lynch

IPC分类号： H01L21/00 ,  H01L21/223 ,  H01L21/225 ,  H01L21/3215

CPC分类号： H01L21/67253 ,  H01L21/223 ,  H01L21/2252 ,  H01L21/2257 ,  H01L21/32155 ,  Y10S148/129

摘要： Shallow regions are formed in a semiconductor body by irradiating the surface region with a pulsed laser beam in an atmosphere including the dopant. The pulsed laser beam has sufficient intensity to drive in dopant atoms from the atmosphere but insufficient intensity to melt the semiconductor material. A silicide layer can be placed over the surface of the semiconductor material prior to irradiation with the dopant being driven from the atmosphere through the silicide into the surface region of the semiconductor body. Alternatively, the silicide layer can include dopant atoms prior to irradiating the surface region.

摘要翻译： 通过在包括掺杂剂的气氛中用脉冲激光束照射表面区域，在半导体本体中形成浅区域。 脉冲激光束具有足够的强度来驱动来自大气的掺杂剂原子，但不足以使半导体材料熔化。 在辐照之前，硅化物层可以放置在半导体材料的表面上，掺杂剂通过硅化物从大气驱动到半导体本体的表面区域。 或者，硅化物层可以在照射表面区域之前包括掺杂剂原子。