公开(公告)号：US06489992B2

公开(公告)日：2002-12-03

申请号：US09731259

申请日：2000-12-06

Applicant: Eugene D. Savoye

Inventor： Eugene D. Savoye

IPC: H04N5225

CPC classification number: H04N5/335 ,  H04N5/20 ,  H04N5/3696

Abstract: A CCD imaging system is provided, including a short focal length lens for accepting light from the scene to be imaged and a charge storage medium having a charge storage substrate that is curved in a selected nonplanar focal surface profile and located a selected distance from the lens with the focal surface facing the lens, the focal surface profile and the lens-to-substrate distance selected such that the light accepted by the lens is in focus at the position of the substrate. There is provided a support substrate on which the nonplanar charge storage substrate is supported to maintain the selected surface profile of the charge storage substrate. An array of pixels defined in the charge storage substrate by pixel interconnections is supported on the front side of the substrate, such that exposure of the substrate to light from the scene through the lens produces charge packets in the pixels, with the pixel interconnection providing selective electronic temporal control of transfer of charge packets from one pixel to another in the substrate. The invention provides a technique for suppressing dark current charge packet generation in the substrate pixels. An output circuit converts the charge packets in the pixels to an electrical pixel signal of output pixel values based on the light from the scene. A plurality of pixel values together form an image frame, the output pixel values being produced at a rate corresponding to the image frame rate, R.

Abstract translation: 提供了一种CCD成像系统，包括用于接收来自要成像的场景的光的短焦距透镜和具有电荷存储基板的电荷存储介质，所述电荷存储介质在所选择的非平面焦面表面轮廓中弯曲并且位于离所述透镜的选定距离处 焦点表面面向透镜，焦平面轮廓和透镜到基底的距离被选择使得透镜所接受的光在基板的位置处聚焦。 提供了支撑基板，其上支撑非平面电荷存储基板以维持电荷存储基板的所选择的表面轮廓。 通过像素互连限定在电荷存储基板中的像素阵列被支撑在基板的前侧，使得基板通过透镜从场景的光的曝光在像素中产生电荷分组，其中像素互连提供选择性 电子时间控制电荷分组从基板上的一个像素转移到另一个像素。 本发明提供一种用于抑制基板像素中的暗电荷电荷分组产生的技术。 输出电路基于来自场景的光将像素中的电荷分组转换为输出像素值的电像素信号。 多个像素值一起形成图像帧，输出像素值以对应于图像帧率R的速率产生。

公开(公告)号：US5940685A

公开(公告)日：1999-08-17

申请号：US739097

申请日：1996-10-28

Applicant: Andrew H. Loomis ,  James A. Gregory ,  Eugene D. Savoye ,  Bernard B. Kosicki

Inventor： Andrew H. Loomis ,  James A. Gregory ,  Eugene D. Savoye ,  Bernard B. Kosicki

IPC: H01L27/148 ,  H01L31/18 ,  H01L21/00

CPC classification number: H01L31/186 ,  H01L27/1464 ,  H01L27/14831 ,  Y02E10/50 ,  Y10S438/928

Abstract: The wafer thickness of a CCD front illuminated silicon wafer is reduced to about ten to twenty microns, the Al substrate is removed and a 5-35 nanometer silicon oxide layer is produced on the thinned back of the silicon wafer followed by implanting boron ions within the back surface to a depth up to about ten nanometers. Furnace annealing the wafer is now carried out, and the Al substrate is redeposited to enable the formation of gate contacts.

Abstract translation: CCD前照明硅晶片的晶片厚度减小到约十至二十微米，去除Al衬底，并在硅晶片的薄化背面上产生5-35纳米的氧化硅层，随后将硼离子注入 后表面深达约10纳米。 现在进行炉退火晶片，并且再次沉积Al衬底以形成栅极接触。

公开(公告)号：US5880777A

公开(公告)日：1999-03-09

申请号：US632746

申请日：1996-04-15

Applicant: Eugene D. Savoye ,  Allen M. Waxman ,  Robert K. Reich ,  Barry E. Burke ,  James A. Gregory ,  William H. McGonagle ,  Andrew H. Loomis ,  Bernard B. Kosicki ,  Robert W. Mountain ,  Alan N. Gove ,  David A. Fay ,  James E. Carrick

Inventor： Eugene D. Savoye ,  Allen M. Waxman ,  Robert K. Reich ,  Barry E. Burke ,  James A. Gregory ,  William H. McGonagle ,  Andrew H. Loomis ,  Bernard B. Kosicki ,  Robert W. Mountain ,  Alan N. Gove ,  David A. Fay ,  James E. Carrick

IPC: H01L27/148 ,  H04N5/20 ,  H04N5/335 ,  H04N5/351 ,  H04N5/361 ,  H04N5/372 ,  H04N5/225

CPC classification number: H04N5/335 ,  H04N5/20 ,  H04N5/3696

Abstract: An imaging system is provided for imaging a scene to produce a sequence of image frames of the scene at a frame rate, R, of at least about 25 image frames per second. The system includes an optical input port, a charge-coupled imaging device, an analog signal processor, and an analog-to-digital processor (A/D). The A/D digitizes the amplified pixel signal to produce a digital image signal formatted as a sequence of image frames each of a plurality of digital pixel values and having a dynamic range of digital pixel values represented by a number of digital bits, B, where B is greater than 8. A digital image processor is provided for processing digital pixel values in the sequence of image frames to produce an output image frame sequence at the frame rate, R, representative of the imaged scene, with a latency of no more than about 1/R and a dynamic range of image frame pixel values represented by a number of digital bits, D, where D is less than B. The output image frame sequence is characterized by noise-limited resolution of at least a minimum number, N.sub.M, of line pairs per millimeter, referred to the charge-coupled imaging device pixel array, in an imaged scene as a function of illuminance of the input light impinging the charge-coupled imaging device pixels.

Abstract translation: 提供一种成像系统，用于对场景进行成像，以每秒至少约25幅图像帧的帧速率R产生场景的图像序列序列。 该系统包括光输入端口，电荷耦合成像装置，模拟信号处理器和模数转换器（A / D）。 A / D数字化放大的像素信号以产生格式化为多个数字像素值中的每一个的一系列图像帧并且具有由多个数字位B表示的数字像素值的动态范围的数字图像信号，其中 B大于8.提供数字图像处理器用于处理图像帧序列中的数字像素值以产生代表成像场景的帧速率R的输出图像帧序列，等待时间不超过 约1 / R和由数字比特数D表示的图像帧像素值的动态范围，其中D小于B.输出图像帧序列的特征在于噪声限制分辨率至少最小数目NM 被称为电荷耦合成像装置像素阵列的线对每毫米在成像场景中作为照射电荷耦合成像装置像素的输入光的照度的函数。

公开(公告)号：US4232245A

公开(公告)日：1980-11-04

申请号：US838713

申请日：1977-10-03

Applicant: Eugene D. Savoye ,  Thomas W. Edwards ,  Lloyd F. Wallace

Inventor： Eugene D. Savoye ,  Thomas W. Edwards ,  Lloyd F. Wallace

IPC: H01J29/45 ,  H01J29/44

CPC classification number: H01J29/455

Abstract: A target for vidicons and image intensifier tubes include a potential barrier less than about 1500 A from an input signal sensing surface. The targets also include various passivation means for stabilizing the energy level configuration along the input signal sensing surface by substantially fixing the valence or conduction band along that surface relative to the Fermi level.

Abstract translation: 视频和图像增强管的目标包括从输入信号感测表面小于大约1500A的势垒。 目标还包括各种钝化装置，用于通过基本上固定沿着该表面相对于费米能级的价带或导带来沿着输入信号感测表面稳定能级配置。

公开(公告)号：US4656519A

公开(公告)日：1987-04-07

申请号：US784662

申请日：1985-10-04

Applicant: Eugene D. Savoye

Inventor： Eugene D. Savoye

IPC: H01L27/148 ,  H01L29/768 ,  H04N5/359 ,  H04N5/3728 ,  H04N3/14 ,  H01L27/14

CPC classification number: H04N3/1568 ,  H01L27/1464 ,  H01L27/14831 ,  H01L27/14875 ,  H01L29/76833 ,  H04N3/1537

Abstract: Back-illuminated CCD imagers of interline transfer type are made possible by deep, highly doped implant regions which bury the CCDs with respect to the back-illuminated surfaces of the imager substrates. Transfer smear caused by photoconversion in the CCD charge transfer channels must be suppressed in certain of these back-illuminated CCD imagers of interline transfer type, and suitable suppression methods are described.

Abstract translation: 通过深的高度掺杂的注入区域使得行间转移型的背照式CCD成像器成为可能，其相对于成像器衬底的背面照射表面掩埋CCD。 必须抑制CCD电荷转移通道中的光转换引起的转移污迹，这些转移型线间转移型的这些背照式CCD成像器中的一些，并且描述了合适的抑制方法。

公开(公告)号：US4603342A

公开(公告)日：1986-07-29

申请号：US761677

申请日：1985-08-02

Applicant: Eugene D. Savoye ,  Walter F. Kosonocky ,  Lloyd F. Wallace

Inventor： Eugene D. Savoye ,  Walter F. Kosonocky ,  Lloyd F. Wallace

IPC: H01L27/148 ,  H01L31/18 ,  H01L27/14 ,  G11C19/28

CPC classification number: H01L27/14887 ,  H01L31/18

Abstract: An imaging array of the charge transfer type having improved sensitivity is disclosed. The array includes a plurality of substantially parallel charge transfer channels with channel stops therebetween which extend a distance into a semiconductor body. At least some of the channel stops have blooming drains therein for the removal of excess photogenerated charge. The improvement comprises potential barrier means which constrain electrical charge generated by absorption of light in the body to flow into the channels while preventing the loss of such charge by direct flow to the blooming drains. Potential barrier means include buried barrier regions extending a further distance into the body from those channel stops having blooming drain regions therein.

Abstract translation: 公开了具有改进的灵敏度的电荷转移类型的成像阵列。 该阵列包括多个基本上平行的电荷传输通道，其间具有通道阻挡件，其延伸到半导体本体中的距离。 至少一些通道挡板在其中具有开口的排水口以去除过量的光生电荷。 该改进包括势垒装置，其限制通过吸收身体中的光而产生的电荷流入通道，​​同时通过直接流动到开花的排水口来防止这种电荷的损失。 电势屏障装置包括从其中具有开放漏极区的那些通道阻挡区向主体延伸更远距离的掩埋阻挡区域。

公开(公告)号：US4547957A

公开(公告)日：1985-10-22

申请号：US636562

申请日：1984-08-01

Applicant: Eugene D. Savoye ,  Charles M. Tomasetti

Inventor： Eugene D. Savoye ,  Charles M. Tomasetti

IPC: H01L27/146 ,  H01L31/18 ,  H01L27/14

CPC classification number: H01L27/14698 ,  H01L27/14654 ,  H01L27/14687 ,  Y10S148/024 ,  Y10S148/06 ,  Y10S148/172

Abstract: An imaging device includes a wafer of single crystal semiconductor material having a first surface with an input surfacing region which extends into the wafer from the first surface and a second surface with a charge storage portion which includes a plurality of discrete charge storing regions which extend into the wafer of the second surface. The wafer includes a potential barrier within the input signal sensing portion for controlling blooming. The wafer is improved by including a passivation region within the input sensing portion for stabilizing the energy level of the conductivity band of the minority carriers at the Fermi energy level of the semiconductor wafer. Additionally, an electrical leakage reduction region extends into the wafer from the second surface. The leakage reduction region is contiguous with each of the discrete charge storage regions.

Abstract translation: 一种成像装置包括具有第一表面的单晶半导体材料晶片，第一表面具有从第一表面延伸到晶片中的输入表面区域和具有电荷存储部分的第二表面，该电荷存储部分包括多个分立的电荷存储区域， 第二表面的晶片。 晶片包括用于控制起霜的输入信号感测部分内的势垒。 通过在输入感测部分内包括钝化区域来改善晶片，以稳定半导体晶片的费米能级的少数载流子的导电带的能级。 此外，漏电减少区域从第二表面延伸到晶片。 泄漏减少区域与每个离散电荷存储区域相邻。