Abstract:
An optically isolated circuit device includes a first opto-isolator circuit that is driven by a first clock signal, and the output of the first opto-isolator circuit is used to drive a phase-locked loop (PLL) that is configured to synthesize a second clock signal having a frequency that is a multiple of the first clock signal frequency. The second clock signal is used as an input to a suitable clocked circuit of a type that benefits from optical isolation, such as an analog-to-digital converter (ADC).
Abstract:
According to one embodiment, there is provided a high voltage isolation dual capacitor communication system comprising communication drive and sense electrodes and corresponding first and second capacitors that are formed in two separate devices. The two devices are electrically connected in series to provide a single galvanicly-isolated communication system that exhibits high breakdown voltage performance in combination with good signal coupling. The system effects communications between drive and receive circuits through the first and second capacitors, and in a preferred embodiment is capable of effecting relatively high-speed digital communications. The system may be formed in a small package using, by way of example, CMOS or other semiconductor fabrication and packaging processes.
Abstract:
In one embodiment, apparatus is provided with current optimization logic, a programmable current source for generating a reference current threshold, and current programming logic. In response to a plurality of input pulses received by a first TIA, the current optimization logic produces a series of digitized current values in response to i) a signal correlated to an output of the first TIA, to ii) a reference signal to which the output of the first TIA is compared. The current programming logic i) programs the programmable current source using ones of the series of digitized current values, until a predetermined condition is met, and then ii) locks the programmable current source to a most recent one of the digitized current values. In response to the reference current threshold, a second TIA produces the reference signal.
Abstract:
An integrated circuit battery sensor and system thereof are provided. The battery sensor includes a voltage sensor configured to sample a voyage of a battery and a buffer in electrical communication with the voltage sensor and configured for scaling the sampled battery voltage and outputting a voltage signal proportional to the sampled battery voltage; wherein the voltage sensor is further configured for isolating the buffer from the battery. The voltage sensor includes a first capacitor coupled to a positive potential terminal of the battery and a second capacitor coupled to a negative potential terminal of the battery. The battery sensor includes a first die including a first and second input terminal configured for coupling to the positive and negative potential terminals of the battery; and a second die including the voltage sensor, wherein the first and second die are electrically isolated from each other.
Abstract:
According to one embodiment, there is provided a high voltage drive circuit comprising drive and sense electrodes formed substantially in a single plane. The device effects signal transfer between drive and receive circuits through the drive and sense electrodes by capacitive means, and permits high voltage devices, such as IGBTs, to be driven thereby without the use of high voltage transistors, thereby eliminating the need to use expensive fabrication processes such as SOI when manufacturing high voltage gate drive circuits and ICs. The device may be formed in a small package using, by way of example, using CMOS or other conventional low-cost semiconductor fabrication and packaging processes.
Abstract:
An integrated circuit battery sensor and system thereof are provided. The battery sensor includes a voltage sensor configured to sample a voyage of a battery and a buffer in electrical communication with the voltage sensor and configured for scaling the sampled battery voltage and outputting a voltage signal proportional to the sampled battery voltage; wherein the voltage sensor is further configured for isolating the buffer from the battery. The voltage sensor includes a first capacitor coupled to a positive potential terminal of the battery and a second capacitor coupled to a negative potential terminal of the battery. The battery sensor includes a first die including a first and second input terminal configured for coupling to the positive and negative potential terminals of the battery; and a second die including the voltage sensor, wherein the first and second die are electrically isolated from each other.