公开(公告)号：US07076677B2

公开(公告)日：2006-07-11

申请号：US10330053

申请日：2002-12-30

Applicant: Maynard C. Falconer ,  Zane A. Ball

Inventor： Maynard C. Falconer ,  Zane A. Ball

IPC: G06F1/12 ,  G06F1/04 ,  G11C7/00 ,  G11C7/22

CPC classification number: H03L7/00 ,  H04L7/0008 ,  H04L7/02

Abstract: A source synchronous bus system is provided with a bus; a first device connected to the bus, having a driver to drive data and strobe signals, via the bus; and a second device connected to the bus, having a receiver to receive data and the strobe signals from the bus, and to select one of rising and falling edges of the strobe signals to latch a corresponding one of rising and falling edges of the data received from the bus, for subsequent data processing functions in order to compensate for systematic differences between rising and falling edges of the data received, via the bus.

Abstract translation: 源同步总线系统配有总线; 连接到总线的第一设备，具有经由总线驱动数据和选通信号的驱动器; 以及连接到总线的第二设备，具有从总线接收数据和选通信号的接收器，并且选择选通信号的上升沿和下降沿之一以锁存所接收的数据的相应的上升沿和下降沿中的一个 用于后续数据处理功能，以便通过总线补偿所接收数据的上升沿和下降沿之间的系统差异。

公开(公告)号：US06587323B1

公开(公告)日：2003-07-01

申请号：US09470925

申请日：1999-12-22

Applicant: Maynard C. Falconer

Inventor： Maynard C. Falconer

IPC: H02H300

CPC classification number: H03K5/088 ,  H03K19/00361

Abstract: A circuit including a power supply plane, a ground supply plane, and a signal source that generates reference voltage signals and a first signal. The signal source includes a driver adapted to generate a first signal to the receiver, the first signal having a present and a previous voltage levels. The signal source also includes a low reference voltage generator and a high reference voltage generator, each producing a low reference voltage signal and a high reference voltage signal, respectively, from a low reference output and a high reference output, respectively. The high reference output and the low reference output are coupled to the ground plane and the power supply plane, respectively. The high reference voltage generator and the low reference generator are capable of communicating the high reference voltage signal and the low reference voltage signal to the receiver.

Abstract translation: 一种电路，包括电源平面，接地电源面和产生参考电压信号和第一信号的信号源。 信号源包括适于向接收机生成第一信号的驱动器，第一信号具有当前和先前的电压电平。 信号源还包括分别从低参考输出和高参考输出分别产生低参考电压信号和高参考电压信号的低参考电压发生器和高参考电压发生器。 高参考输出和低参考输出分别耦合到接地层和电源平面。 高参考电压发生器和低参考发生器能够将高参考电压信号和低参考电压信号传送到接收器。

公开(公告)号：US06346842B1

公开(公告)日：2002-02-12

申请号：US08989836

申请日：1997-12-12

Applicant: Stephen H. Hall, Jr. ,  Maynard C. Falconer

Inventor： Stephen H. Hall, Jr. ,  Maynard C. Falconer

IPC: H03H1126

CPC classification number: H03H11/265 ,  H05K1/0237 ,  H05K1/029 ,  H05K1/0293 ,  H05K3/222 ,  H05K2201/0305 ,  H05K2201/09263 ,  H05K2201/10636 ,  H05K2203/171 ,  H05K2203/173 ,  Y02P70/611

Abstract: A variable delay path circuit having delay paths of different lengths is disclosed. Any of the delay paths can be selected to match the operating conditions of the system. In one embodiment of the invention, a delay path circuit having two delay paths connects a driver and receiver. Each of the two delay paths contains sites at both ends for placing zero ohm resistors, solder or copper slugs. To select one of the two delay paths, zero ohm resistors, solder or copper slugs are placed in the sites at the ends of the desired delay path. The delay is then dictated by the time it takes for a clocking signal to travel the length of selected delay path.

Abstract translation: 公开了具有不同长度的延迟路径的可变延迟路径电路。 可以选择任何延迟路径以匹配系统的操作条件。 在本发明的一个实施例中，具有两个延迟路径的延迟路径电路连接驱动器和接收器。 两个延迟路径中的每一个都包含两端的位置，用于放置零欧姆电阻，焊料或铜芯棒。 要选择两个延迟路径中的一个，零欧姆电阻，焊料或铜芯块放置在所需延迟路径末端的位置。 然后延迟由时钟信号行进所选择的延迟路径的长度所花费的时间决定。

公开(公告)号：US20150086084A1

公开(公告)日：2015-03-26

申请号：US14036212

申请日：2013-09-25

Applicant: MAYNARD C. FALCONER ,  DEBABANI CHOUDHURY ,  REZA AREFI ,  DANIEL J. DAHLE ,  DENVER H. DASH ,  VALLABHAJOSYULA S. SOMAYAZULU ,  XINGANG GUO

Inventor： MAYNARD C. FALCONER ,  DEBABANI CHOUDHURY ,  REZA AREFI ,  DANIEL J. DAHLE ,  DENVER H. DASH ,  VALLABHAJOSYULA S. SOMAYAZULU ,  XINGANG GUO

IPC: G06K9/00 ,  G06K9/46 ,  G06T3/40

CPC classification number: G06K9/00979 ,  G06K9/00664

Abstract: Systems and methods to generate maps or models of structures are disclosed. Features of the structure to be mapped may be determined for the purposes of generating the map or model based at least in part on images associated with the structure, sensor measurements associated with the structure, and phase data of communications signals that interact with the structure. The mapping or modeling processes may be performed at a mapping server that receives images, sensor data, and/or communications signal phase information from one or more user devices, such as mobile devices. The mapping servers may perform a simultaneous localization and mapping (SLAM) process and may enhance the generated maps using sensor and/or communications phase data to map one or more hidden features of the structure.

Abstract translation: 公开了生成地图或结构模型的系统和方法。 可以至少部分地基于与结构相关联的图像，与结构相关联的传感器测量以及与该结构相互作用的通信信号的相位数据来生成要映射的结构的特征，用于生成地图或模型。 映射或建模过程可以在从诸如移动设备的一个或多个用户设备接收图像，传感器数据和/或通信信号相位信息的映射服务器执行。 映射服务器可以执行同时定位和映射（SLAM）过程，并且可以使用传感器和/或通信阶段数据来增强生成的映射，以映射该结构的一个或多个隐藏特征。

公开(公告)号：US08988255B2

公开(公告)日：2015-03-24

申请号：US14006702

申请日：2011-10-01

Applicant: Dawson W. Kesling ,  Maynard C. Falconer ,  Kevin P. Slattery ,  Harry G. Skinner

Inventor： Dawson W. Kesling ,  Maynard C. Falconer ,  Kevin P. Slattery ,  Harry G. Skinner

IPC: H03M7/00 ,  H03M7/02 ,  H04L27/34

CPC classification number: H03M7/02 ,  H04L27/3411

Abstract: A method for managing information includes receiving bits of data, determining phasors for bits at only one frequency of a transmission spectrum, combining the phasors of bits that form a phasor having a spectral energy that lies within a predetermined range, and forming a codeword from the bits of the combined phasors.

Abstract translation: 一种用于管理信息的方法包括接收数据位，仅在传输频谱的一个频率处确定位的相量，组合具有处于预定范围内的频谱能量的相量的位的相量，以及从 组合相量的位。

公开(公告)号：US20150026741A1

公开(公告)日：2015-01-22

申请号：US13943855

申请日：2013-07-17

Applicant: Anthony G. Lamarca ,  Xingang GUO ,  Maynard C. Falconer

Inventor： Anthony G. Lamarca ,  Xingang GUO ,  Maynard C. Falconer

IPC: H04N21/61 ,  H04N21/835 ,  H04N21/433 ,  H04N21/435

CPC classification number: H04N21/6175 ,  H04N21/4331 ,  H04N21/435 ,  H04N21/4351 ,  H04N21/44209 ,  H04N21/835

Abstract: Generally, this disclosure provides systems, devices, methods and computer readable media for the use of digital TV (DTV) bandwidth for web cache pre-loading. A system may include a receiver module configured to receive a digital television (DTV) signal. The system may also include a data extraction module configured to extract the web cache data from the DTV signal, wherein the web cache data is encoded within the spectral bandwidth of the DTV signal. The system may further include a network interface configured to transmit the extracted web cache data to a device that includes a web cache pre-loading service.

Abstract translation: 通常，本公开提供了用于使用数字TV（DTV）带宽用于web缓存预加载的系统，设备，方法和计算机可读介质。 系统可以包括被配置为接收数字电视（DTV）信号的接收器模块。 该系统还可以包括数据提取模块，其被配置为从DTV信号中提取网页缓存数据，其中网页缓存数据在DTV信号的频谱带宽内被编码。 该系统还可以包括被配置为将所提取的web缓存数据发送到包括web缓存预加载服务的设备的网络接口。

公开(公告)号：US08689018B2

公开(公告)日：2014-04-01

申请号：US12975105

申请日：2010-12-21

Applicant: Satish Prathaban ,  Ramaswamy Parthasarathy ,  Maynard C. Falconer

Inventor： Satish Prathaban ,  Ramaswamy Parthasarathy ,  Maynard C. Falconer

IPC: G06F1/26

CPC classification number: G06F1/28 ,  G06F1/305 ,  G11C5/14

Abstract: An apparatus and method is described herein for reducing noise in a power distribution network for an interface. The power distribution network is characterized. And based on that characterization, worst case patterns for the interface are predicted and avoided. As one example, characterization includes providing a stimulus, such as a step function stimulus, and determining a mathematical function response, such as a step function response. Then, based on the step function response, a resonant frequency for the power distribution network is determined; from which patterns that cause the resonant frequency are identified/predicted. And when identified patterns are detected, they are scrambled or manipulated to avoid causing a worst-case noise scenario in an interface's power distribution network.

Abstract translation: 本文描述了一种用于降低用于接口的配电网络中的噪声的装置和方法。 配电网络的特点。 并且基于该表征，预测并避免了界面的最坏情况模式。 作为一个示例，表征包括提供诸如步骤功能刺激的刺激，以及确定诸如阶梯函数响应的数学函数响应。 然后，基于阶梯函数响应，确定配电网络的谐振频率; 从中识别/预测引起共振频率的图案。 并且当检测到识别的模式时，它们被加扰或操纵以避免在接口的配电网络中造成最坏情况的噪声情况。

公开(公告)号：US20120159226A1

公开(公告)日：2012-06-21

申请号：US12975105

申请日：2010-12-21

Applicant: Satish Prathaban ,  Ramaswamy Parthasarathy ,  Maynard C. Falconer

Inventor： Satish Prathaban ,  Ramaswamy Parthasarathy ,  Maynard C. Falconer

IPC: G06F1/26

CPC classification number: G06F1/28 ,  G06F1/305 ,  G11C5/14

Abstract: An apparatus and method is described herein for reducing noise in a power distribution network for an interface. The power distribution network is characterized. And based on that characterization, worst case patterns for the interface are predicted and avoided. As one example, characterization includes providing a stimulus, such as a step function stimulus, and determining a mathematical function response, such as a step function response. Then, based on the step function response, a resonant frequency for the power distribution network is determined; from which patterns that cause the resonant frequency are identified/predicted. And when identified patterns are detected, they are scrambled or manipulated to avoid causing a worst-case noise scenario in an interface's power distribution network.

Abstract translation: 本文描述了一种用于降低用于接口的配电网络中的噪声的装置和方法。 配电网络的特点。 并且基于该表征，预测并避免了界面的最坏情况模式。 作为一个示例，表征包括提供诸如步骤功能刺激的刺激，以及确定诸如阶梯函数响应的数学函数响应。 然后，基于阶梯函数响应，确定配电网络的谐振频率; 从中识别/预测引起共振频率的图案。 并且当检测到识别的模式时，它们被加扰或操纵以避免在接口的配电网络中造成最坏情况的噪声情况。

公开(公告)号：US06249142B1

公开(公告)日：2001-06-19

申请号：US09466966

申请日：1999-12-20

Applicant: Stephen H. Hall ,  Maynard C. Falconer

Inventor： Stephen H. Hall ,  Maynard C. Falconer

IPC: H03K1716

CPC classification number: H04L25/0298

Abstract: A Dynamically Terminated Bus (DTB) comprising a transmission line coupled to a plurality of dynamically configurable components and a bus protocol that only permits a single component to transmit at a time. Each of the dynamically configurable components can be configured as a single unbalanced complementary metal-oxide-semiconductor (CMOS) pull-up driver and a gunning transceiver logic (GTL) on-die, pull-up termination receiver. However, only one dynamically configurable component can be configured as the CMOS pull-up driver at a time. Embodiments of the present invention provide a high speed, DTB for coupling to the components.

Abstract translation: 包括耦合到多个动态可配置组件的传输线的动态终端总线（DTB）以及一次仅允许单个组件发送的总线协议。 每个可动态配置的组件可以被配置为单个不平衡互补金属氧化物半导体（CMOS）上拉驱动器和枪管式收发器逻辑（GTL）管芯上拉终端接收器。 但是，一次只能配置一个可动态配置的组件作为CMOS上拉驱动程序。 本发明的实施例提供了一种用于耦合到组件的高速DTB。

公开(公告)号：US20150070833A1

公开(公告)日：2015-03-12

申请号：US14022868

申请日：2013-09-10

Applicant: Anthony G. LAMARCA ,  Omesh TICKOO ,  Maynard C. FALCONER ,  Shilpa TALWAR ,  Wen-Ling M. HUANG

Inventor： Anthony G. LAMARCA ,  Omesh TICKOO ,  Maynard C. FALCONER ,  Shilpa TALWAR ,  Wen-Ling M. HUANG

IPC: G06F3/01 ,  G06F1/16

CPC classification number: G06F3/011 ,  G06F1/163 ,  G06F1/1635 ,  G06F1/1698 ,  H04M1/0256

Abstract: This disclosure is directed to a composable thin computing device. An example device may comprise at least a device interface module, a communication module, a processing module, a memory module, a composable computing module and a power module. The device interface module may couple the device to an operational environment via at least one of a physical connector or a wireless connection. The communication module may at least one of transmit or receive data via the device interface module. The processing module may process the data. The memory module may store at least a portion of the data. The composable computing module may cause at least one of the above modules to perform certain functionality related to the operational environment. The power module may power at least one of the above modules.

Abstract translation: 本公开涉及可组合的薄计算设备。 示例性设备可以包括至少设备接口模块，通信模块，处理模块，存储器模块，可组合计算模块和功率模块。 设备接口模块可以经由物理连接器或无线连接中的至少一个将设备耦合到操作环境。 通信模块可以经由设备接口模块发送或接收数据中的至少一个。 处理模块可以处理数据。 存储器模块可以存储数据的至少一部分。 可组合计算模块可以使至少一个上述模块执行与操作环境相关的某些功能。 电源模块可以为上述模块中的至少一个供电。