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    Programmable refresh circuits and methods for integrated circuit memory devices
    12.
    发明授权
    Programmable refresh circuits and methods for integrated circuit memory devices 失效
    用于集成电路存储器件的可编程刷新电路和方法

    公开(公告)号：US5812475A

    公开(公告)日：1998-09-22

    申请号：US770845

    申请日：1996-12-20

    Applicant: Sang-Kil Lee ,  Hyun-Soon Jang

    Inventor： Sang-Kil Lee ,  Hyun-Soon Jang

    IPC: G11C11/403 ,  G11C11/401 ,  G11C11/406 ,  G11C7/00

    CPC classification number: G11C11/406

    Abstract: A self refresh circuit for an integrated circuit memory device includes a programmable refresh circuit, a plurality of counters, and a refresh cycle selection circuit. The programmable refresh circuit can be electrically programmed to generate one of a plurality of refresh control signals. A first one of the counters generates a first oscillating output signal having a first predetermined period and each successive counter generates a respective oscillating output signal having a respective period twice that of a respective preceding counter. The refresh cycle selection circuit selects a self refresh cycle from one of the oscillating output signals in response to the refresh control signal generated by the at least one programmable refresh circuit. Related methods are also disclosed.

    Abstract translation: 用于集成电路存储器件的自刷新电路包括可编程刷新电路，多个计数器和刷新周期选择电路。 可编程刷新电路可以被电编程以产生多个刷新控制信号中的一个。 第一个计数器产生具有第一预定周期的第一振荡输出信号，并且每个连续的计数器产生相应的振荡输出信号，该振荡输出信号的相应周期是相应的前一个计数器的两倍。 刷新周期选择电路响应于由至少一个可编程刷新电路产生的刷新控制信号，从振荡输出信号中的一个选择自刷新周期。 还公开了相关方法。

    Method and circuit for testing memory cells in semiconductor memory device
    13.
    发明授权
    Method and circuit for testing memory cells in semiconductor memory device 失效
    用于测试半导体存储器件中的存储单元的方法和电路

    公开(公告)号：US5732029A

    公开(公告)日：1998-03-24

    申请号：US650398

    申请日：1996-05-20

    Applicant: Sang-Kil Lee ,  Yong-Sik Seok

    Inventor： Sang-Kil Lee ,  Yong-Sik Seok

    IPC: G11C11/401 ,  G11C29/00 ,  G11C29/24 ,  G11C29/34 ,  G11C7/00

    CPC classification number: G11C29/808 ,  G11C29/24 ,  G11C29/781

    Abstract: A test control circuit and method of testing a memory cell in a semiconductor memory device. The test control circuit includes a memory cell array having a plurality of normal memory cells to store data on a semiconductor substrate and a plurality of redundancy memory cells to substitute for defective normal memory cells. Row and column redundancy fuse boxes include fuse elements to be electrically fused to enable row and column redundancy decoders for selecting rows and columns of the redundancy memory cells. A redundancy cell test signal generator generates, in response to a test signal applied to an extra line in the address bus, a master clock for testing the redundancy memory cell under the same mode as a test mode of the normal memory cell. A test controller provides an enable signal for selecting the redundancy memory cells of a memory array in response to logic levels of the master clock and an address signal applied during the redundancy memory cell test.

    Abstract translation: 一种测试半导体存储器件中的存储单元的测试控制电路和方法。 测试控制电路包括具有多个正常存储器单元的存储单元阵列，以在半导体衬底上存储数据，以及多个冗余存储单元来代替有缺陷的正常存储单元。 行和列冗余保险丝盒包括要电熔接的熔丝元件，以实现用于选择冗余存储器单元的行和列的行和列冗余解码器。 冗余单元测试信号发生器响应于施加到地址总线中的额外线路的测试信号而产生用于在与正常存储器单元的测试模式相同的模式下测试冗余存储单元的主时钟。 测试控制器提供用于响应于主时钟的逻辑电平和在冗余存储器单元测试期间施加的地址信号来选择存储器阵列的冗余存储单元的使能信号。

    MOBILE ELECTRONIC DEVICE INCLUDING EMBEDDED MEMORY
    14.
    发明申请
    MOBILE ELECTRONIC DEVICE INCLUDING EMBEDDED MEMORY 有权
    包含嵌入式存储器的移动电子设备

    公开(公告)号：US20160054917A1

    公开(公告)日：2016-02-25

    申请号：US14738583

    申请日：2015-06-12

    Applicant: Sang-Kil LEE

    Inventor： Sang-Kil LEE

    IPC: G06F3/06 ,  G06F12/08

    CPC classification number: G06F3/061 ,  G06F3/0656 ,  G06F3/068 ,  G06F2212/1016

    Abstract: An electronic device may include first and second semiconductor chips. The first semiconductor chip may include a processor and a first memory. The second semiconductor chip may include a second memory. The first memory and second memory may be configured to exchange first data and second data with the processor, respectively. The processor may be configured to exchange target data processed or to be processed with the first and second memories. The processor may be configured to determine the target data as the first data if the number of accesses of the target data is equal to or greater than a first reference value. The processor may be configured to determine the target data as the second data if the number of accesses of the target data is less than the first reference value.

    Abstract translation: 电子设备可以包括第一和第二半导体芯片。 第一半导体芯片可以包括处理器和第一存储器。 第二半导体芯片可以包括第二存储器。 第一存储器和第二存储器可以被配置为分别与处理器交换第一数据和第二数据。 处理器可以被配置为与第一和第二存储器交换处理或要处理的目标数据。 如果目标数据的访问次数等于或大于第一参考值，则处理器可以被配置为将目标数据确定为第一数据。 如果目标数据的访问次数小于第一参考值，则处理器可以被配置为将目标数据确定为第二数据。

    BLOCK STUDYING TOOL FOR INFANT
    16.
    发明申请
    BLOCK STUDYING TOOL FOR INFANT 审中-公开
    婴儿块研究工具

    公开(公告)号：US20150343320A1

    公开(公告)日：2015-12-03

    申请号：US14702105

    申请日：2015-05-01

    Applicant: Sang Kil LEE ,  Young Soon KIM

    Inventor： Sang Kil LEE ,  Young Soon KIM

    IPC: A63H33/06

    CPC classification number: A63H33/065 ,  A63H33/086

    Abstract: A block studying tool for an infant, includes: a block body having a hexahedral shape, a lower portion of which is opened; and a plurality of unit assembling portions disposed to protrude from an upper portion of the block body upward and disposed to be spaced a predetermined distance apart from each other, wherein a divider is disposed at an inside of the lower portion of the block body and forms an assembling space in which the plurality of unit assembling portions of the adjacent block body are to be assembled according to positions.

    Abstract translation: 一种用于婴儿的块学习工具，包括：具有六面体形状的块体，其下部打开; 以及多个单元组装部，其设置成从所述块体的上部向上突出并设置成彼此隔开预定距离，其中分隔件设置在所述块体的下部的内侧，并形成 根据位置组装相邻块体的多个单元组装部的组装空间。

    MICROELECTRONIC SUBSTRATE INSPECTION EQUIPMENT USING HELIUM ION MICROSCOPY
    17.
    发明申请
    MICROELECTRONIC SUBSTRATE INSPECTION EQUIPMENT USING HELIUM ION MICROSCOPY 有权
    微电子基板检测设备使用HELIUM离子显微镜

    公开(公告)号：US20130175445A1

    公开(公告)日：2013-07-11

    申请号：US13596644

    申请日：2012-08-28

    Applicant: Min-Kook Kim ,  Woo-Seok Ko ,  Yu-Sin Yang ,  Sang-Kil Lee ,  Chang-Hoon Choi

    Inventor： Min-Kook Kim ,  Woo-Seok Ko ,  Yu-Sin Yang ,  Sang-Kil Lee ,  Chang-Hoon Choi

    IPC: H01J37/20

    CPC classification number: H01J37/265 ,  H01J37/08 ,  H01J2237/002 ,  H01J2237/006 ,  H01J2237/0807

    Abstract: Microelectronic substrate inspection equipment includes a gas container which contains helium gas, a helium ion generator which is disposed in the gas container and converts the helium gas into helium ions and a wafer stage which is disposed under the gas container and on which a substrate to be inspected is placed. The equipment further includes a secondary electron detector which is disposed above the wafer stage and detects electrons generated from the substrate, a compressor which receives first gaseous nitrogen from a continuous nitrogen supply device and compresses the received first gaseous nitrogen into liquid nitrogen, a liquid nitrogen dewar which is connected to the compressor and stores the liquid nitrogen, and a cooling device that is coupled to the helium ion generator. The cooling device is disposed on the gas container, and cools the helium ion generator by vaporizing the liquid nitrogen. Related methods are also disclosed.

    Abstract translation: 微电子基板检查设备包括含有氦气的气体容器，设置在气体容器中并将氦气转换为氦离子的氦离子发生器和设置在气体容器下方的晶片载台， 检查被放置。 该设备还包括二次电子检测器，其设置在晶片台上方并检测从基板产生的电子;压缩机，其接收来自连续氮供应装置的第一气态氮并将接收到的第一气态氮压缩成液态氮;液氮 连接到压缩机并储存液氮的杜瓦瓶，以及耦合到氦离子发生器的冷却装置。 冷却装置设置在气体容器上，并通过蒸发液氮来冷却氦离子发生器。 还公开了相关方法。

    METHODS OF GENERATING THREE-DIMENSIONAL PROCESS WINDOW QUALIFICATION
    19.
    发明申请
    METHODS OF GENERATING THREE-DIMENSIONAL PROCESS WINDOW QUALIFICATION 有权
    生成三维过程窗口资格的方法

    公开(公告)号：US20120315583A1

    公开(公告)日：2012-12-13

    申请号：US13462250

    申请日：2012-05-02

    Applicant: Young-Hoon Sohn ,  Sang-Kil Lee ,  Yu-Sin Yang

    Inventor： Young-Hoon Sohn ,  Sang-Kil Lee ,  Yu-Sin Yang

    IPC: G03F7/20

    CPC classification number: G03F7/70616 ,  G03F7/705

    Abstract: In a method of generating a three-dimensional process window qualification, a photoresist layer is coated on a substrate including an underlying structure. A plurality of circular-shaped regions of the substrate are distinguished into 1 to n regions to partition the substrate into a center portion and an edge portion, n being a natural number greater than 2. 1 to n exposing ranges are set, including a common exposing condition for the 1 to n regions. A photoresist pattern is fox led by exposing each shot portion in the 1 to n regions using a split exposing condition in the 1 to n exposing ranges. The photoresist pattern is detected, and a normal photoresist pattern with respect to each of the 1 to n regions is selected to generate the three-dimensional process window qualification.

    Abstract translation: 在产生三维工艺窗口鉴定的方法中，光致抗蚀剂层被涂覆在包括下面的结构的衬底上。 衬底的多个圆形区域被区分为1到n个区域，以将衬底分成中心部分和边缘部分，n是大于2的自然数，1至n个曝光范围被设置，包括公共 暴露1〜n个区域的状况。 光致抗蚀剂图案是通过在1至n个曝光范围内使用分割曝光条件曝光1至n个区域中的每个拍摄部分来引导的狐狸。 检测光致抗蚀剂图案，并且选择相对于1至n个区域中的每一个的常规光致抗蚀剂图案以产生三维工艺窗口鉴定。

    Nanoliposome Using Esterified Lecithin And Method For Preparing The Same, And Composition For Preventing Or Treating Skin Diseases Comprising The Same
    20.
    发明申请
    Nanoliposome Using Esterified Lecithin And Method For Preparing The Same, And Composition For Preventing Or Treating Skin Diseases Comprising The Same 有权
    使用酯化卵磷脂的纳米脂质体及其制备方法，以及用于预防或治疗包含其的皮肤疾病的组合物

    公开(公告)号：US20090263473A1

    公开(公告)日：2009-10-22

    申请号：US12375739

    申请日：2007-08-01

    Applicant: Joon Pio Hong ,  Sang Kil Lee ,  Won Chul Kim ,  Chae Ha Yoon ,  Sang Wook Lee ,  Kyeong Sun Shin ,  Seung Kook Park

    Inventor： Joon Pio Hong ,  Sang Kil Lee ,  Won Chul Kim ,  Chae Ha Yoon ,  Sang Wook Lee ,  Kyeong Sun Shin ,  Seung Kook Park

    IPC: A61K9/127 ,  A61K38/43 ,  A61K36/00

    CPC classification number: A61K9/1271 ,  A61K8/14 ,  A61K8/553 ,  A61K9/1277 ,  A61K2800/413 ,  A61Q19/00 ,  B82Y5/00

    Abstract: The present invention relates to a nanoliposome comprising a liposome membrane containing esterified lecithin, and one or more physiologically active ingredients included in inner space of the liposome membrane; a method for preparing the same; and a composition for preventing or treating skin diseases, comprising the same. The nanoliposome according to the present invention has long-term stability and uniformity, and so can be used to prepare a composition for skin having excellent moisturizing and penetrating properties, such as cosmetics, medicament for treating skin diseases, or the like. In particular, the present composition for preventing or treating skin diseases comprises epidermal growth factor included in the nanoliposome, thereby showing an excellent effect of stimulating skin-penetration and good pharmaceutical stability. Also, the esterified lecithin used in preparing liposome can provide effects of softening skin and stimulating skin-penetration, thereby enhancing the penetration of epidermal growth factor and natural extract into skin, as well as additional moisturizing effect which is advantageous in treating skin diseases. Further, since the present composition comprises nanoliposome prepared by containing esterified lecithin in liposome membrane, the conventional problems of heating and dispersing active ingredients at high temperature (70° C. or more), low stability and uniformity, or the like can be solved.

    Abstract translation: 本发明涉及包含含有酯化卵磷脂的脂质体膜和包含在脂质体膜的内部空间中的一种或多种生理活性成分的纳米脂质体， 其制备方法; 以及用于预防或治疗皮肤病的组合物。 根据本发明的纳米脂质体具有长期的稳定性和均匀性，因此可以用于制备具有优异的保湿和渗透性的皮肤组合物，例如化妆品，用于治疗皮肤病的药物等。 特别地，本发明的皮肤病预防或治疗组合物包括纳米脂质体中所含的表皮生长因子，因此显示刺激皮肤渗透和良好药物稳定性的优异效果。 此外，用于制备脂质体的酯化卵磷脂可以提供软化皮肤和刺激皮肤渗透的作用，从而增强表皮生长因子和天然提取物对皮肤的渗透性，以及有利于治疗皮肤疾病的额外的保湿作用。 此外，由于本发明的组合物包含通过在脂质体膜中含有酯化的卵磷脂而制备的纳米脂质体，因此可以解决在高温（70℃以上）下加热分散有效成分的常规问题，稳定性和均匀性低等。

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