公开(公告)号：US20140109090A1

公开(公告)日：2014-04-17

申请号：US13836628

申请日：2013-03-15

Applicant: Steven M. Bennett ,  Andrew V. Anderson ,  Stalinselvaraj Jeyasingh ,  Alain Kagi ,  Gilbert Neiger ,  Richard Uhlig ,  Xiang Zou ,  Lawrence Smith ,  Scott Rodgers

Inventor： Steven M. Bennett ,  Andrew V. Anderson ,  Stalinselvaraj Jeyasingh ,  Alain Kagi ,  Gilbert Neiger ,  Richard Uhlig ,  Xiang Zou ,  Lawrence Smith ,  Scott Rodgers

IPC: G06F9/455

CPC classification number: G06F9/45533 ,  G06F9/45558 ,  G06F2009/45583

Abstract: In one embodiment, a predefined behavior of a virtual machine monitor (VMM) with respect to one or more virtual machines (VMs) is identified, and processor-managed resources associated with the one or more VMs are utilized based on the predefined behavior of the VMM.

Abstract translation: 在一个实施例中，识别相对于一个或多个虚拟机（VM）的虚拟机监视器（VMM）的预定义行为，并且基于所述一个或多个虚拟机（VM）的预定义行为来利用与所述一个或多个VM相关联的处理器管理的资源 VMM。

公开(公告)号：US08217382B1

公开(公告)日：2012-07-10

申请号：US12715241

申请日：2010-03-01

Applicant: Joanna N. Ptasinski ,  Stephen D. Russell ,  J. Scott Rodgers

Inventor： Joanna N. Ptasinski ,  Stephen D. Russell ,  J. Scott Rodgers

IPC: H01L29/06

CPC classification number: B82Y20/00 ,  G02B6/1225

Abstract: An optical-powered device includes a flexible substrate, a photonic bandgap layer coupled thereto, a waveguide contained within the photonic bandgap layer, and a dendrimer region contained within the waveguide. The dendrimer region may comprise more than one dendrimers. The dendrimer region emission band is within the photonic bandgap of the photonic bandgap layer. Multiple photonic bandgap layers may be included, with one or more waveguides therein. Each waveguide may have a dendrimer region therein. Electronic circuitry may be contained within a portion of the photonic bandgap layer. A light-modulating layer may be directly coupled to the photonic bandgap layer. A portion of the photonic bandgap layer may have a sensing material embedded therein. A cover layer having one or more windows may be coupled to the photonic bandgap layer. Another layer, such as a buffer layer, may be disposed between the substrate layer and the photonic bandgap layer.

Abstract translation: 光学设备包括柔性衬底，耦合到其上的光子带隙层，包含在光子带隙层内的波导和包含在波导内的树枝状大分子区域。 树枝状大分子区域可以包含多于一个的树枝状大分子。 树枝状大分子区域发射带在光子带隙层的光子带隙内。 可以包括多个光子带隙层，其中具有一个或多个波导。 每个波导可以在其中具有树枝状大分子区域。 电子电路可以包含在光子带隙层的一部分内。 光调制层可以直接耦合到光子带隙层。 光子带隙层的一部分可以具有嵌入其中的感测材料。 具有一个或多个窗口的覆盖层可以耦合到光子带隙层。 可以在衬底层和光子带隙层之间设置诸如缓冲层的另一层。

公开(公告)号：US20120079481A1

公开(公告)日：2012-03-29

申请号：US13290798

申请日：2011-11-07

Applicant: STEVEN M. BENNETT ,  Andrew V. Anderson ,  Stalinselvaraj Jeyasingh ,  Alain Kagi ,  Gilbert Neiger ,  Richard Uhlig ,  Xiang Zou ,  Lawrence Smith ,  Scott Rodgers

Inventor： STEVEN M. BENNETT ,  Andrew V. Anderson ,  Stalinselvaraj Jeyasingh ,  Alain Kagi ,  Gilbert Neiger ,  Richard Uhlig ,  Xiang Zou ,  Lawrence Smith ,  Scott Rodgers

IPC: G06F9/455

CPC classification number: G06F9/45533 ,  G06F9/45558 ,  G06F2009/45583

Abstract: In one embodiment, a predefined behavior of a virtual machine monitor (VMM) with respect to one or more virtual machines (VMs) is identified, and processor-managed resources associated with the one or more VMs are utilized based on the predefined behavior of the VMM.

Abstract translation: 在一个实施例中，识别相对于一个或多个虚拟机（VM）的虚拟机监视器（VMM）的预定义行为，并且基于所述一个或多个虚拟机（VM）的预定义行为来利用与所述一个或多个VM相关联的处理器管理的资源 VMM。

公开(公告)号：US07269323B1

公开(公告)日：2007-09-11

申请号：US11526890

申请日：2006-09-12

Applicant: John Scott Rodgers ,  Joanna N. Ptasinski ,  Stephen D. Russell

Inventor： John Scott Rodgers ,  Joanna N. Ptasinski ,  Stephen D. Russell

IPC: G02B6/10

CPC classification number: G02B6/1225 ,  B82Y20/00 ,  G02B2006/12061

Abstract: A 3D Photonic Bandgap Device in SOI (NC#98374). The structure includes a substrate having a semiconductor layer over an insulator layer and a 3D photonic bandgap structure having at least one period operatively coupled to the substrate. The apparatus has a funnel waveguide configuration.

Abstract translation: SOI中的三维光子带隙器件（NC＃98374）。 该结构包括在绝缘体层上具有半导体层的衬底和具有至少一个可操作地耦合到衬底的周期的3D光子带隙结构。 该装置具有漏斗波导配置。

公开(公告)号：US20060224858A1

公开(公告)日：2006-10-05

申请号：US11100032

申请日：2005-04-05

Applicant: Hong Wang ,  Gautham Chinya ,  Richard Hankins ,  Shivnandan Kaushik ,  Bryant Bigbee ,  Per Hammarlund ,  Xiang Zou ,  Jason Brandt ,  Prashant Sethi ,  Douglas Carmean ,  Baiju Patel ,  John Shen ,  Scott Rodgers ,  Ryan Rakvic ,  John Reid ,  David Poulsen ,  Sanjiv Shah ,  James Held ,  James Abel

Inventor： Hong Wang ,  Gautham Chinya ,  Richard Hankins ,  Shivnandan Kaushik ,  Bryant Bigbee ,  Per Hammarlund ,  Xiang Zou ,  Jason Brandt ,  Prashant Sethi ,  Douglas Carmean ,  Baiju Patel ,  John Shen ,  Scott Rodgers ,  Ryan Rakvic ,  John Reid ,  David Poulsen ,  Sanjiv Shah ,  James Held ,  James Abel

IPC: G06F12/00

CPC classification number: G06F9/485 ,  G06F9/30043 ,  G06F9/30076 ,  G06F9/3851 ,  G06F9/3885 ,  G06F9/3891 ,  G06F9/461 ,  G06F9/4881

Abstract: Disclosed are embodiments of a system, methods and mechanism for management and translation of mapping between logical sequencer addresses and physical or logical sequencers in a multi-sequencer multithreading system. A mapping manager may manage assignment and mapping of logical sequencer addresses or pages to actual sequencers or frames of the system. Rationing logic associated with the mapping manager may take into account sequencer attributes when such mapping is performed Relocation logic associated with the mapping manager may manage spill and fill of context information to/from a backing store when re-mapping actual sequencers. Sequencers may be allocated singly, or may be allocated as part of partitioned blocks. The mapping manager may also include translation logic that provides an identifier for the mapped sequencer each time a logical sequencer address is used in a user program. Other embodiments are also described and claimed.

Abstract translation: 公开了用于管理和转换逻辑定序器地址与多序列器多线程系统中的物理或逻辑顺控程序之间的映射的系统，方法和机制的实施例。 映射管理器可以管理逻辑顺控程序地址或页面到系统的实际定序器或帧的分配和映射。 与映射管理器相关联的配给逻辑可以在执行这样的映射时考虑定序器属性。当重新映射实际的定序器时，与映射管理器相关联的重定位逻辑可以管理向/从备份存储器的上下文信息的溢出和填充。 排序器可以单独分配，或者可以被分配为分区块的一部分。 映射管理器还可以包括每当在用户程序中使用逻辑定序器地址时为映射的定序器提供标识符的翻译逻辑。 还描述和要求保护其他实施例。

公开(公告)号：US07040548B2

公开(公告)日：2006-05-09

申请号：US10246097

申请日：2002-09-19

Applicant: Steven Scott Rodgers

Inventor： Steven Scott Rodgers

IPC: A24F25/00 ,  A61L9/04 ,  B01D47/00 ,  F02M37/00

CPC classification number: A01M31/008 ,  Y10S261/88

Abstract: A residual free scent dispenser for dispersion of scent having a housing and a scent container having a scent permeating material disposed therein. The housing has an air intake port and an air exhaust port. The scent container has at least one perforation and is disposed in the air exhaust port. Air is drawn into the housing through the air intake port and exhausted through at least one perforation of the scent container passing air over the scent permeating material. The principle use is for hunting, however other scent dispersing uses will benefit from this invention. For example, home or car applications will benefit from this invention.

公开(公告)号：US20130185580A1

公开(公告)日：2013-07-18

申请号：US13786939

申请日：2013-03-06

Applicant: MARTIN DIXON ,  SCOTT RODGERS ,  TARANEH BAHRAMI ,  STEPHEN GUNTHER ,  PRASHANT SETHI

Inventor： MARTIN DIXON ,  SCOTT RODGERS ,  TARANEH BAHRAMI ,  STEPHEN GUNTHER ,  PRASHANT SETHI

IPC: G06F1/32

CPC classification number: G06F1/3234 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3228 ,  G06F1/3293 ,  G06F9/30083 ,  G06F9/3009 ,  Y02D10/122 ,  Y02D50/20

Abstract: In one embodiment, the present invention includes a processor having a core with decode logic to decode an instruction prescribing an identification of a location to be monitored and a timer value, and a timer coupled to the decode logic to perform a count with respect to the timer value. The processor may further include a power management unit coupled to the core to determine a type of a low power state based at least in part on the timer value and cause the processor to enter the low power state responsive to the determination. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括具有解码逻辑的核的处理器，用于解码指定要监视的位置的标识的指令和定时器值，以及耦合到解码逻辑的定时器，以执行相对于 定时器值。 处理器还可以包括耦合到核的功率管理单元，以至少部分地基于定时器值来确定低功率状态的类型，并且使处理器响应于该确定而进入低功率状态。 描述和要求保护其他实施例。

公开(公告)号：US08309371B1

公开(公告)日：2012-11-13

申请号：US12506932

申请日：2009-07-21

Applicant: Paul R. De La Houssaye ,  J. Scott Rodgers

Inventor： Paul R. De La Houssaye ,  J. Scott Rodgers

IPC: H01L21/027 ,  G03F7/00 ,  H01S3/05

CPC classification number: H01L21/31058 ,  G02B1/005 ,  H01L21/0273 ,  H01L21/31055

Abstract: A system and method include forming an optical cavity by positioning a photonic crystal a predetermined distance from a substrate, and creating, within the cavity, a standing wave having a substantially flat wavefront. The standing wave may be created by applying an input wave to a first surface of the photonic crystal. The predetermined distance may be such that a peak intensity of the standing wave is proximate to or a calculated distance from the substrate surface. The peak intensity may vary in relation to the substrate surface. The method may include tuning the peak intensity location within the cavity by shifting the wavelength of the input wave or altering the characteristics of the photonic crystal by an external field. A second photonic crystal may be used on the other side of the substrate to replace the reflecting properties of the substrate, allowing for further smoothing of the wavefront.

Abstract translation: 一种系统和方法包括通过将光子晶体与衬底定位一定距离来形成光腔，并且在空腔内产生具有基本上平坦的波前的驻波。 可以通过将输入波施加到光子晶体的第一表面来产生驻波。 预定距离可以使得驻波的峰值强度接近或距离衬底表面的计算距离。 峰强度可以相对于衬底表面而变化。 该方法可以包括通过偏移输入波的波长或通过外部场来改变光子晶体的特性来调谐腔内的峰值强度位置。 可以在基板的另一侧使用第二光子晶体来代替基板的反射特性，从而允许进一步平滑波前。

公开(公告)号：US07233730B1

公开(公告)日：2007-06-19

申请号：US11416507

申请日：2006-04-12

Applicant: John Scott Rodgers ,  Joanna N. Ptasinski ,  Stephen D. Russell

Inventor： John Scott Rodgers ,  Joanna N. Ptasinski ,  Stephen D. Russell

IPC: G02B6/10 ,  H01L21/00

CPC classification number: G02B6/1225 ,  B82Y20/00 ,  G02B2006/12061

Abstract: A 3D Photonic Bandgap Device in SOI Method (NC#97881). The method includes providing a substrate comprising a semiconductor layer over an insulator layer and fabricating a 3D photonic bandgap structure having at least one period over the substrate.

Abstract translation: SOI方法中的3D光子带隙器件（NC＃97881）。 该方法包括在绝缘体层上提供包括半导体层的衬底，并制造在衬底上具有至少一个周期的3D光子带隙结构。

公开(公告)号：US20070006231A1

公开(公告)日：2007-01-04

申请号：US11173326

申请日：2005-06-30

Applicant: Hong Wang ,  John Shen ,  Ed Grochowski ,  James Held ,  Bryant Bigbee ,  Shivnandan Kaushik ,  Gautham Chinya ,  Xiang Zou ,  Per Hammarlund ,  Xinmin Tian ,  Anil Aggarwal ,  Scott Rodgers ,  Prashant Sethi ,  Baiju Patel ,  Richard Hankins

Inventor： Hong Wang ,  John Shen ,  Ed Grochowski ,  James Held ,  Bryant Bigbee ,  Shivnandan Kaushik ,  Gautham Chinya ,  Xiang Zou ,  Per Hammarlund ,  Xinmin Tian ,  Anil Aggarwal ,  Scott Rodgers ,  Prashant Sethi ,  Baiju Patel ,  Richard Hankins

IPC: G06F9/46

CPC classification number: G06F9/3867 ,  G06F9/30003 ,  G06F9/30043 ,  G06F9/3005 ,  G06F9/3009 ,  G06F9/30145 ,  G06F9/3017 ,  G06F9/30174 ,  G06F9/3851 ,  G06F9/4843 ,  G06F9/4881

Abstract: In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.

Abstract translation: 在一个实施例中，提供了一种方法。 该方法包括响应于在应用级程序的控制下对第二指令定序器执行用户级指令来管理第一指令定序器上的用户级线程。 在第二指令定序器上运行第一用户级线程并且包含一个或多个用户级指令。 第一用户级指令至少具有1）引用一个或多个指令定序器的字段，或者2）使用指向代码执行代码时特定寻址一个或多个指令定序器的代码的指针进行隐式引用。