Abstract:
A method for reducing output rate of video data for DisplayPort sink device is disclosed. By reducing the size of a blank area in a video frame, the invention reduces a pixel rate to become compatible with more types of back-end circuits having lower processing rates.
Abstract:
A timing controller for a display processing device includes: a plurality of predetermined pins for receiving an image signal by a pin-share method, wherein the image signal is a first format image signal or a second format image signal; a detector coupled to the predetermined pins and for detecting at least one of the predetermined pins to determine whether the image signal is the first format image signal or the second format image signal and outputting a detection result; and a processor coupled to the detector and for processing the image signal according to the detection result to generate and output a timing control signal.
Abstract:
A receiver includes; a recovery circuit for receiving an input signal, and generating a data signal and a recovery clock; a processing circuit for processing the data signal to generate a processed signal; and a synchronization determining circuit for determining a synchronization state of the recovery clock according to the processed signal and a first reference value. The data signal includes a synchronous pattern, and the first reference value corresponds to at least a portion of a value in the synchronous pattern processed by the processing circuit. A method of the receiver is also disclosed.
Abstract:
An apparatus and method for regenerating S/PDIF data is disclosed. The apparatus includes a buffer for buffering sample words of the data units; a decision unit for receiving control words of the data units and outputting a selected control word according to a current control word of a current data unit and a previous control word of a previous data unit; and a transmitter for generating the bitstream of the first digital interconnect format according to the sample words of the data units and the selected control words outputted from the decision unit.
Abstract:
The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.
Abstract:
The present invention discloses a method for determining a target type of a plurality of control signals respectively transmitted via a plurality of channels in a multi-channel system. The method includes: receiving a plurality of first control signals simultaneously from the channels during a first time period; determining a control signal priority corresponding to the first time period according to a target type determined by actual types of a plurality of second control signals respectively transmitted via the channels during a second time period, wherein the second time period is prior to the first time period; and determining the target type of the first control signals according to the control signal priority and actual types of the first control signals.
Abstract:
The present invention provides an integrated circuit suitable for various packaging modes. This integrated circuit includes: a core circuit, a plurality of pads, and a selection circuit. The selection circuit is coupled between the core circuit and the pads for determining the connection state between the core circuit and the pads based on a control signal. When the control signal provides a first value, the core circuit and the pads will be in a first connection state, and the integrated circuit will be applied with a single-die package. However, when the control signal provides a second value, the core circuit and the pads will be in the second connection state, and the integrated circuit will be applied with a multi-die package.
Abstract:
A six-degree-of-freedom magnetic levitation positioning system includes a levitated platform, six impelling coils disposed adjacent to the platform, and six permanent magnets attached to the platform such that each of the permanent magnets is adjacent to and magnetically aligned with a respective one of the impelling coils, whereby there are six magnet-coil sets. Among the six sets, three of the sets are maglev sets in which magnetic axes of the impelling coils are generally vertically aligned, and another three of the sets are horizontal impelling sets in which magnetic axes of the impelling coils are generallv horizontally aligned. The magnetic axes of the three horizontal impelling sets are all mutually non-parallel, so that elevation and tiltings of the platform can be actuated by adjusting the currents in coils of the three maglev sets, and translations and rotations about a vertical axis of the platform can be actuated by adjusting the currents in coils of the three horizontal impelling sets. Thus, motion in every degree of freedom (three rotations and three translations) is possible.
Abstract:
The present invention discloses a signal receiving method for determining a transmission format of an input signal and a related signal receiving circuit. The signal receiving method includes: receiving the input signal; generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and determining the transmission format of the input signal according to the signal detecting result. The signal receiving circuit includes: an input interface, for receiving an input signal; a detecting module, for generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and a determining unit, for determining the transmission format of the input signal according to the signal detecting result.
Abstract:
A receiving method and apparatus is disclosed. The method comprising steps of: receiving a plurality of data according to a symbol clock signal, and reading out the plurality of data according to a first clock signal and generating a water level; receiving a second clock signal so as to generate a third clock signal, and adjusting the speed of the third clock signal according to the water level; determining a sampling frequency of the plurality of data according to a data amount of the plurality of data during a unit time period or parameters of the plurality of data; and dividing the third clock signal by a dividing value or multiplying the third clock signal by a multiplying value so as to obtain the first clock signal and adjust the water level by a clock generator.