VARIABLE RESISTANCE ELEMENT, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING VARIABLE RESISTANCE ELEMENT
    11.
    发明申请
    VARIABLE RESISTANCE ELEMENT, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING VARIABLE RESISTANCE ELEMENT 有权
    可变电阻元件,半导体器件和制造可变电阻元件的方法

    公开(公告)号:US20100225438A1

    公开(公告)日:2010-09-09

    申请号:US12280013

    申请日:2007-02-27

    IPC分类号: H01C7/10 H01C17/06

    摘要: A method for manufacturing a variable resistance element includes the steps of: depositing a variable resistance material (106) in a contact hole (105), which is formed on an interlayer insulating layer (104) on a substrate and has a lower electrode (103) at a bottom portion thereof, such that an upper surface of the variable resistance material (106) in the contact hole (105) is located lower than an upper surface of the interlayer insulating layer (104); depositing an upper electrode material on the deposited variable resistance material (106) such that an upper surface of the upper electrode material in the contact hole (105) is located higher than the upper surface of the interlayer insulating layer (104); and element-isolating by a CMP the variable resistance element including the variable resistance material (106) and the upper electrode material.

    摘要翻译: 一种制造可变电阻元件的方法包括以下步骤:将可变电阻材料(106)沉积在形成在衬底上的层间绝缘层(104)上的接触孔(105)中,并具有下电极(103) ),使得所述接触孔(105)中的所述可变电阻材料(106)的上表面位于所述层间绝缘层(104)的上表面以下。 在所述沉积的可变电阻材料(106)上沉积上电极材料,使得所述接触孔(105)中的上电极材料的上表面位于比所述层间绝缘层(104)的上表面高; 以及通过CMP对包括可变电阻材料(106)和上电极材料的可变电阻元件进行元件隔离。

    RESISTANCE CHANGE ELEMENT AND MANUFACTURING METHOD THEREFOR
    12.
    发明申请
    RESISTANCE CHANGE ELEMENT AND MANUFACTURING METHOD THEREFOR 有权
    电阻变化元件及其制造方法

    公开(公告)号:US20130112936A1

    公开(公告)日:2013-05-09

    申请号:US13810708

    申请日:2012-01-18

    IPC分类号: H01L45/00

    摘要: A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first transition metal oxide layer, the second electrode has a single needle-shaped part at the interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the needle-shaped part.

    摘要翻译: 一种可变电阻元件,包括:第一电极; 第二电极; 以及可变电阻层,其具有根据施加的电信号可逆地改变的电阻值,其中所述可变电阻层包括包含第一氧缺乏过渡金属氧化物的第一可变电阻层和包含第二过渡金属的第二可变电阻层 具有低于第一过渡金属氧化物层的氧缺乏程度的氧缺乏的氧化物,第二电极在与第二可变电阻层的界面处具有单个针状部分,并且插入第二可变电阻层 在第一可变电阻层和第二电极之间,与第一可变电阻层和第二电极接触并覆盖针状部分。

    NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, AND METHOD OF MANUFACTURE THEREOF
    13.
    发明申请
    NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, AND METHOD OF MANUFACTURE THEREOF 有权
    非易失性存储元件,非易失性存储器件及其制造方法

    公开(公告)号:US20090014710A1

    公开(公告)日:2009-01-15

    申请号:US12281034

    申请日:2007-03-06

    IPC分类号: H01L45/00

    摘要: A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3b arranged around the first region 3a and having a larger content of oxygen than the first region 3a, wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3a.

    摘要翻译: 设置下电极层2,形成在下电极层2上的上电极层4和形成在下电极层2和上电极层4之间的金属氧化物薄膜层3。 金属氧化物薄膜层3包括第一区域3a,其第一区域3a的电阻值通过施加在下电极层2和上电极层4之间的电脉冲和围绕第一区域3a布置的第二区域3b而增大或减小,以及 具有比第一区域3a更大的氧含量,其中下电极层2和上电极层4以及第一区域3a的至少一部分从第一区域的厚度方向观察而重叠 3a。

    NONVOLATILE MEMORY APPARATUS AND MANUFACTURING METHOD THEREOF
    14.
    发明申请
    NONVOLATILE MEMORY APPARATUS AND MANUFACTURING METHOD THEREOF 有权
    非易失性存储器及其制造方法

    公开(公告)号:US20100264392A1

    公开(公告)日:2010-10-21

    申请号:US12742841

    申请日:2008-11-14

    IPC分类号: H01L45/00 H01L21/02

    摘要: A nonvolatile memory device includes via holes (12) formed at cross sections where first wires (11) cross second wires (14), respectively, and current control elements (13) each including a current control layer (13b), a first electrode layer (13a) and a second electrode layer (13c) such that the current control layer (13b) is sandwiched between the first electrode layer (13a) and the second electrode layer (13c), in which resistance variable elements (15) are provided inside the via holes (12), respectively, the first electrode layer (13a) is disposed so as to cover the via hole (12), the current control layer (13b) is disposed so as to cover the first electrode layer (13a), the second electrode layer (13c) is disposed on the current control layer (13b), a wire layer (14a) of the second wire is disposed on the second electrode layer (13c), and the second wires (14) each includes the current control layer (13b), the second electrode layer (13c) and the wire layer (14a) of the second wire.

    摘要翻译: 非易失性存储器件包括分别形成在第一布线(11)与第二布线(14)交叉的横截面处的通孔(12),以及各自包括电流控制层(13b)的电流控制元件(13),第一电极层 (13a)和第二电极层(13c),使得电流控制层(13b)夹在第一电极层(13a)和第二电极层(13c)之间,其中电阻可变元件(15)设置在其内 通孔(12)分别设置成覆盖通孔(12),电流控制层(13b)被设置成覆盖第一电极层(13a), 第二电极层(13c)设置在电流控制层(13b)上,第二导线的导线层(14a)设置在第二电极层(13c)上,第二导线(14)各自包括电流 控制层(13b),第二电极层(13c)和第二wi的导线层(14a) 回覆。

    NONVOLATILE MEMORY ELEMENT ARRAY AND MANUFACTURING METHOD THEREOF
    15.
    发明申请
    NONVOLATILE MEMORY ELEMENT ARRAY AND MANUFACTURING METHOD THEREOF 有权
    非易失性存储元件阵列及其制造方法

    公开(公告)号:US20100090193A1

    公开(公告)日:2010-04-15

    申请号:US12445380

    申请日:2007-10-12

    IPC分类号: H01L47/00

    摘要: A lower electrode (22) is provided on a semiconductor chip substrate (26). A lower electrode (22) is covered with a first interlayer insulating layer (27) from above. A first contact hole (28) is provided on the lower electrode (22) to penetrate through the first interlayer insulating layer (27). A low-resistance layer (29) forming the resistance variable layer (24) is embedded to fill the first contact hole (28). A high-resistance layer (30) is provided on the first interlayer insulating layer (27) and the low-resistance layer (29). The resistance variable layer (24) is formed by a multi-layer resistance layer including a single layer of the high-resistance layer (30) and a single layer of the low-resistance layer (29). The low-resistance layer (29) forming the memory portion (25) is isolated from at least its adjacent memory portion (25).

    摘要翻译: 下电极(22)设置在半导体芯片基板(26)上。 下部电极(22)从上方被第一层间绝缘层(27)覆盖。 第一接触孔(28)设置在下电极(22)上以穿透第一层间绝缘层(27)。 嵌入形成电阻变化层(24)的低电阻层(29)以填充第一接触孔(28)。 在第一层间绝缘层(27)和低电阻层(29)上设置有高电阻层(30)。 电阻变化层(24)由包含单层高电阻层(30)和单层低电阻层(29)的多层电阻层形成。 形成存储器部分(25)的低电阻层(29)至少与其相邻的存储器部分(25)隔离。

    Method for manufacturing nonvolatile storage element and method for manufacturing nonvolatile storage device
    16.
    发明授权
    Method for manufacturing nonvolatile storage element and method for manufacturing nonvolatile storage device 有权
    非易失性存储元件的制造方法及其制造方法

    公开(公告)号:US07981760B2

    公开(公告)日:2011-07-19

    申请号:US12669812

    申请日:2009-05-07

    IPC分类号: H01L21/00

    摘要: A method for manufacturing a nonvolatile storage element that minimizes shape shift between an upper electrode and a lower electrode, and which includes: depositing, in sequence, a connecting electrode layer which is conductive, a lower electrode layer and a variable resistance layer which are made of a non-noble metal nitride and are conductive, an upper electrode layer made of noble metal, and a mask layer; forming the mask layer into a predetermined shape; forming the upper electrode layer, the variable resistance layer, and the lower electrode layer into the predetermined shape by etching using the mask layer as a mask; and removing, simultaneously, the mask and a region of the connecting electrode layer that has been exposed by the etching.

    摘要翻译: 一种用于制造使上部电极和下部电极之间的形状偏移最小化的非易失性存储元件的方法,包括:依次沉积导电的连接电极层,下部电极层和可变电阻层 的非贵金属氮化物,并且是导电的,由贵金属制成的上电极层和掩模层; 将掩模层形成为预定形状; 通过使用掩模层作为掩模通过蚀刻将上电极层,可变电阻层和下电极层形成为预定形状; 并且同时去除已经通过蚀刻暴露的掩模和连接电极层的区域。

    Nonvolatile memory element array with storing layer formed by resistance variable layers
    17.
    发明授权
    Nonvolatile memory element array with storing layer formed by resistance variable layers 有权
    具有由电阻变化层形成的存储层的非易失存储元件阵列

    公开(公告)号:US07960770B2

    公开(公告)日:2011-06-14

    申请号:US12445380

    申请日:2007-10-12

    IPC分类号: H01L29/76

    摘要: A lower electrode (22) is provided on a semiconductor chip substrate (26). A lower electrode (22) is covered with a first interlayer insulating layer (27) from above. A first contact hole (28) is provided on the lower electrode (22) to penetrate through the first interlayer insulating layer (27). A low-resistance layer (29) forming the resistance variable layer (24) is embedded to fill the first contact hole (28). A high-resistance layer (30) is provided on the first interlayer insulating layer (27) and the low-resistance layer (29). The resistance variable layer (24) is formed by a multi-layer resistance layer including a single layer of the high-resistance layer (30) and a single layer of the low-resistance layer (29). The low-resistance layer (29) forming the memory portion (25) is isolated from at least its adjacent memory portion (25).

    摘要翻译: 下电极(22)设置在半导体芯片基板(26)上。 下部电极(22)从上方被第一层间绝缘层(27)覆盖。 第一接触孔(28)设置在下电极(22)上以穿透第一层间绝缘层(27)。 嵌入形成电阻变化层(24)的低电阻层(29),以填充第一接触孔(28)。 在第一层间绝缘层(27)和低电阻层(29)上设置有高电阻层(30)。 电阻变化层(24)由包含单层高电阻层(30)和单层低电阻层(29)的多层电阻层形成。 形成存储器部分(25)的低电阻层(29)至少与其相邻的存储器部分(25)隔离。

    NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, AND METHOD OF MANUFACTURE THEREOF
    18.
    发明申请
    NONVOLATILE MEMORY ELEMENT, NONVOLATILE MEMORY APPARATUS, AND METHOD OF MANUFACTURE THEREOF 有权
    非易失性存储元件,非易失性存储器件及其制造方法

    公开(公告)号:US20100200852A1

    公开(公告)日:2010-08-12

    申请号:US12709148

    申请日:2010-02-19

    IPC分类号: H01L29/68 H01L21/34

    摘要: A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3b arranged around the first region 3a and having a larger content of oxygen than the first region 3a, wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3a.

    摘要翻译: 设置下电极层2,形成在下电极层2上的上电极层4和形成在下电极层2和上电极层4之间的金属氧化物薄膜层3。 金属氧化物薄膜层3包括第一区域3a,其第一区域3a的电阻值通过施加在下电极层2和上电极层4之间的电脉冲和围绕第一区域3a布置的第二区域3b而增大或减小,以及 具有比第一区域3a更大的氧含量,其中下电极层2和上电极层4以及第一区域3a的至少一部分从第一区域的厚度方向观察而重叠 3a。

    METHOD FOR MANUFACTURING NONVOLATILE STORAGE ELEMENT AND METHOD FOR MANUFACTURING NONVOLATILE STORAGE DEVICE
    19.
    发明申请
    METHOD FOR MANUFACTURING NONVOLATILE STORAGE ELEMENT AND METHOD FOR MANUFACTURING NONVOLATILE STORAGE DEVICE 有权
    制造非易失性存储元件的方法和制造非易失存储器件的方法

    公开(公告)号:US20100190313A1

    公开(公告)日:2010-07-29

    申请号:US12669812

    申请日:2009-05-07

    IPC分类号: H01L21/8246

    摘要: A method for manufacturing a nonvolatile storage element that minimizes shape shift between an upper electrode and a lower electrode, and which includes: depositing, in sequence, a connecting electrode layer which is conductive, a lower electrode layer and a variable resistance layer which are made of a non-noble metal nitride and are conductive, an upper electrode layer made of noble metal, and a mask layer; forming the mask layer, into a predetermined shape; forming the upper electrode layer, the variable resistance layer, and the lower electrode layer into the predetermined shape by etching using the mask layer as a mask; and removing, simultaneously, the mask and a region of the connecting electrode layer that has been exposed by the etching.

    摘要翻译: 一种用于制造使上部电极和下部电极之间的形状偏移最小化的非易失性存储元件的方法,包括:依次沉积导电的连接电极层,下部电极层和可变电阻层 的非贵金属氮化物,并且是导电的,由贵金属制成的上电极层和掩模层; 形成掩模层,形成预定的形状; 通过使用掩模层作为掩模通过蚀刻将上电极层,可变电阻层和下电极层形成为预定形状; 并且同时去除已经通过蚀刻暴露的掩模和连接电极层的区域。

    Variable resistance element and method of manufacturing the same
    20.
    发明授权
    Variable resistance element and method of manufacturing the same 有权
    可变电阻元件及其制造方法

    公开(公告)号:US09006698B2

    公开(公告)日:2015-04-14

    申请号:US13810708

    申请日:2012-01-18

    IPC分类号: H01L47/00 H01L21/20 H01L45/00

    摘要: A variable resistance element including: a first electrode; a second electrode; and a variable resistance layer having a resistance value which reversibly changes according to electrical signals applied, wherein the variable resistance layer includes a first variable resistance layer comprising a first oxygen-deficient transition metal oxide, and a second variable resistance layer comprising a second transition metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first oxygen-deficient transition metal oxide, the second electrode has a single needle-shaped part at an interface with the second variable resistance layer, and the second variable resistance layer is interposed between the first variable resistance layer and the second electrode, is in contact with the first variable resistance layer and the second electrode, and covers the single needle-shaped part.

    摘要翻译: 一种可变电阻元件,包括:第一电极; 第二电极; 以及可变电阻层,其具有根据施加的电信号可逆地改变的电阻值,其中所述可变电阻层包括包含第一氧缺乏过渡金属氧化物的第一可变电阻层和包含第二过渡金属的第二可变电阻层 具有低于第一缺氧过渡金属氧化物缺氧程度的氧缺乏的氧化物,第二电极在与第二可变电阻层的界面处具有单个针状部分,第二可变电阻层 插入在第一可变电阻层和第二电极之间,与第一可变电阻层和第二电极接触,并且覆盖单个针状部分。