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公开(公告)号：US09325337B1
公开(公告)日：2016-04-26
申请号：US14593591
申请日：2015-01-09
Applicant: ANALOG DEVICES GLOBAL
Inventor： Dennis A. Dempsey
CPC classification number: H03M1/109 , H03M1/1038 , H03M1/66
Abstract: In contrast to some existing techniques, a calibration technique compares multiple outputs which may be, for example, successive or different outputs from the digital-to-analog converter (DAC) in an analog environment and determines differences between at least two outputs in an analog environment. A feedback signal is provided in the digital environment to provide an internal or self-calibration regime. The digital feedback signal is provided to a digital signal processing (DSP) component of the calibration circuitry which uses the feedback signal to determine appropriate input codes to provide to the DAC. The same DAC can be used for both signal generation and feedback DAC purposes, and this provides a self-calibration of the DAC performance which is typically related to the integral non-linearity (INL) characteristics of the DAC transfer function.
Abstract translation: 与一些现有技术相比，校准技术比较多个输出，其可以是例如模拟环境中的数模转换器（DAC）的连续或不同的输出，并且确定模拟的至少两个输出之间的差异 环境。 在数字环境中提供反馈信号以提供内部或自校准方式。 将数字反馈信号提供给校准电路的数字信号处理（DSP）部件，其使用反馈信号来确定适当的输入代码以提供给DAC。 相同的DAC可用于信号发生和反馈DAC用途，并且这提供了DAC性能的自校准，其通常与DAC传递函数的积分非线性（INL）特性相关。
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公开(公告)号：US20200091923A1
公开(公告)日：2020-03-19
申请号：US16131886
申请日：2018-09-14
Applicant: Analog Devices Global Unlimited Company
Inventor： Junbiao Ding , Tony Yincai Liu , Dennis A. Dempsey , John Jude O'Donnell
Abstract: The present disclosure relates to a digital-to-analog converter (DAC) which includes a resistor string and a transfer function modification circuit. The transfer function modification circuit may be a calibration circuit for calibrating the DAC, The calibration circuit may include a plurality of current sources, which may be current DACs. Each of the current DACS inject current into, or drain current from, a respective node of the resistor string, in order to correct for voltage errors. The injected currents may be positive or negative, depending on the voltage error. The current DACs are controlled by trim codes, which are set dependent on the measured or simulated voltage errors for a given resistor string.
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公开(公告)号：US10075179B1
公开(公告)日：2018-09-11
申请号：US15668088
申请日：2017-08-03
Applicant: Analog Devices Global
Inventor： Michael D. Keane , Johan H. Mansson , Dennis A. Dempsey
Abstract: A multiple impedance string, multiple output digital-to-analog converter (DAC) circuit that can include a shared coarse resolution DAC, two first fine resolution DACs to receive outputs of the MSB DAC, and a multiplexer to multiplex outputs of the first and second fine resolution DACs to output terminals. The multiplexer can be configured to interchange coupling of the outputs of the first and second fine resolution DACs using one or more MSBs.
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14.发明申请CONTROL CIRCUIT FOR USE WITH A FOUR TERMINAL SENSOR, AND MEASUREMENT SYSTEM INCLUDING SUCH A CONTROL CIRCUIT 审中-公开与四个终端传感器一起使用的控制电路，以及包括这样一个控制电路的测量系统公开(公告)号：US20170023506A1
公开(公告)日：2017-01-26
申请号：US15187398
申请日：2016-06-20
Applicant: Analog Devices Global
Inventor： Colin G. Lyden , Donal Bourke , Dennis A. Dempsey , Dermot G. O'Keeffe , Patrick C. Kirby
IPC: G01N27/02 , G01N27/49 , G01N27/327 , H03F3/45 , H03F1/34
CPC classification number: G01N27/028 , G01N27/3273 , G01N27/49 , H03F1/34 , H03F3/45475 , H03F2200/261 , H03F2200/462 , H03L5/00
Abstract: A control circuit for use with a four terminal sensor, the sensor having first and second drive terminals and first and second measurement terminals, the control circuit arranged to drive at least one of the first and second drive terminals with an excitation signal, to sense a voltage difference between the first and second measurement terminals, and control the excitation signal such that the voltage difference between the first and second measurement terminals is within a target range of voltages, and wherein the control circuit includes N poles in its transfer characteristic and N−1 zeros in its transfer characteristic such that when a loop gain falls to unity the phase shift around a closed loop is not substantially 2π radians or a multiple thereof, where N is greater than 1.
Abstract translation: 一种与四端子传感器一起使用的控制电路，所述传感器具有第一和第二驱动端子以及第一和第二测量端子，所述控制电路被布置成用激励信号驱动第一和第二驱动端子中的至少一个，以感测 并且控制所述激励信号，使得所述第一测量端子与所述第二测量端子之间的电压差在目标电压范围内，并且其中所述控制电路在其传输特性中包括N极，并且所述N- 1的零传递特性使得当环路增益下降到1时，围绕闭环的相移基本上不是2π弧度或其倍数，其中N大于1。
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Patent Agency Ranking
公开(公告)号：US10027338B2
公开(公告)日：2018-07-17
申请号：US15618620
申请日：2017-06-09
Applicant: Analog Devices Global
Inventor： Dennis A. Dempsey , Harvey T. Mercado
Abstract: A buffer is provided where a part of the buffer is implemented in switched capacitor or other analog discrete time processing circuitry and a dynamic response characteristic, such as an effective gain or charge transfer coefficient between the input stage and an output stage is digitally controllable. This means that the buffer can be driven as if it was a system controlled by, for example a three (3) term controller, giving rise to greater, digital flexibility in tailoring the buffer's transient response.
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公开(公告)号：US09948315B2
公开(公告)日：2018-04-17
申请号：US15618392
申请日：2017-06-09
Applicant: Analog Devices Global
Inventor： Dennis A. Dempsey
IPC: H03M1/10
CPC classification number: H03M1/1009 , H03M1/0881 , H03M1/66
Abstract: Digital to analog converters (DAC) are used to convert digital signals to analog values. The digital system providing data to the analog converter may be highly tasked. A DAC is provided with some in built logic to assist in reducing the load on the devices driving the DAC. The DAC may include a library of functions that it can apply to the input words to modify transitions in the analog output words. The DAC may further include a health checking system for monitoring the digital words being supplied to the DAC and raising a concern, and taking action if required, if the sequence of words is unlikely to be correct or beyond the target operating range.
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公开(公告)号：US20170331489A1
公开(公告)日：2017-11-16
申请号：US15150910
申请日：2016-05-10
Applicant: Analog Devices Global
Inventor： Dennis A. Dempsey , Michael C.W. Coln
Abstract: Many electronic circuits rely on the ratio of one component to other components being well defined. Current flow in component can warm the component causing its electrical properties to change, for example the resistance of a resistor may increase due to self-heating as a result of current flow. The present disclosure provides a way to reduce temperature variation between components so as to reduce electrical mismatch between them or the consequences of such mismatch. This is important as even a change of resistance of, for example, 20-50 ppm in a resistor can result in non-linearity exceeding the least significant bit value of a 16 bit digital to analog converter.
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公开(公告)号：US09583241B1
公开(公告)日：2017-02-28
申请号：US14823843
申请日：2015-08-11
Applicant: ANALOG DEVICES GLOBAL
Inventor： Dennis A. Dempsey
CPC classification number: H03M1/765
Abstract: The present application relates generally to programmable impedances and employs an auxiliary impedance in parallel to a primary programmable impedance to augment the performance of the primary programmable impedance at lower impedance values.
Abstract translation: 本申请一般涉及可编程阻抗，并且采用与主可编程阻抗并联的辅助阻抗，以在较低阻抗值下增加主可编程阻抗的性能。
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公开(公告)号：US09100045B2
公开(公告)日：2015-08-04
申请号：US14214341
申请日：2014-03-14
Applicant: ANALOG DEVICES GLOBAL
Inventor： Dennis A. Dempsey
Abstract: A multi-string DAC is described and comprises at least two DAC stages. Each DAC stage comprises a string of impedance elements and a switching network. In one configuration, the DAC comprises a first and second switching network, the second switching network providing multiple switched paths which compensate for impedance effects of the second string and provides multiple state changes at the output node of the DAC.
Abstract translation: 描述多串DAC并且包括至少两个DAC级。 每个DAC级包括一串阻抗元件和一个交换网络。 在一种配置中，DAC包括第一和第二交换网络，第二交换网络提供多个交换路径，其补偿第二串的阻抗效应，并在DAC的输出节点处提供多个状态改变。
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