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公开(公告)号：US20190355757A1
公开(公告)日：2019-11-21
申请号：US16331285
申请日：2018-05-15
Inventor： Binbin CAO
IPC: H01L27/12
Abstract: Embodiments of the present disclosure relate to an array substrate, a method for manufacturing the same, and a display panel thereof. The array substrate includes a transparent substrate having a first side surface and a second side surface opposite to the first side surface, and a light reflecting structure located on the first side surface of the transparent substrate, wherein the second side surface of the transparent substrate has a coarse region, an orthographic projection of the coarse region on the transparent substrate coinciding with an orthographic projection of the light reflecting structure on the transparent substrate.
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12.发明申请公开(公告)号：US20190172932A1
公开(公告)日：2019-06-06
申请号：US16322272
申请日：2018-02-01
Inventor： Haijiao QIAN , Binbin CAO , Chengshao YANG , Yinhu HUANG
IPC: H01L29/66 , H01L29/786 , H01L21/311 , H01L21/308
Abstract: The present disclosure provides a manufacturing method of thin film transistor, a thin film transistor and a display substrate. The manufacturing method comprises sequentially forming a polysilicon pattern layer and a protective pattern layer on a substrate; etching the protective pattern layer with a first etching gas, so as to obtain a protective pattern; simultaneously etching the protective pattern and the polysilicon pattern layer with a second etching gas by using the protective pattern as a mask, so as to obtain a polysilicon pattern and a residual protective pattern, the protective pattern being etched with the second etching gas at a rate no less than that for etching the polysilicon pattern layer; and forming an amorphous silicon pattern, which is in contact with etched sides of the polysilicon pattern, exposes a part of the residual protective pattern, and forms an active layer together with the polysilicon pattern.
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13.发明申请公开(公告)号：US20170148819A1
公开(公告)日：2017-05-25
申请号：US15114219
申请日：2016-01-21
Inventor： Zhiyuan LIN , Yinhu HUANG , Zhixiang ZOU , Binbin CAO
IPC: H01L27/12 , H01L21/768 , H01L29/49 , G02F1/1343 , G02F1/1333 , G02F1/1362 , G02F1/1368 , H01L21/308 , H01L29/45
CPC classification number: H01L27/124 , G02F1/133345 , G02F1/134309 , G02F1/13439 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/13606 , G02F2001/136222 , G02F2001/13629 , G02F2001/136295 , G02F2201/121 , G02F2201/123 , H01L21/3081 , H01L21/3086 , H01L21/76802 , H01L21/77 , H01L27/1259 , H01L27/1262 , H01L29/41733 , H01L29/45 , H01L29/4908
Abstract: A preparation method of a conductive via hole structure, a preparation method of an array substrate and a preparation method of a display device, the preparation method of the array substrate includes: forming a first metal layer (01) including the first metal structure (01a), forming a non-metallic film including a first part corresponding to the first metal structure (01a) and an organic insulating film (40′) in sequence; patterning the organic insulating film (40′) to form a first organic insulating layer via hole (41) corresponding to the first part; then baking to form an organic insulating layer (40); and then, removing the first part of the non-metallic film to form a non-metallic layer and expose the part of the surface (011) of the first metal structure (01a). This method can avoid the metal structure from being seriously oxidized.
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14.发明申请THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF, ARRAY SUBSTRATE, AND DISPLAY DEVICE 审中-公开薄膜晶体管及其制造方法，阵列基板和显示装置公开(公告)号：US20160293636A1
公开(公告)日：2016-10-06
申请号：US15072940
申请日：2016-03-17
Inventor： Zhixiang ZOU , Binbin CAO , Yinhu HUANG
IPC: H01L27/12 , H01L29/49 , H01L21/3213 , H01L29/66
CPC classification number: H01L27/124 , H01L21/0217 , H01L21/02315 , H01L21/321 , H01L27/1222 , H01L27/1255 , H01L29/42384 , H01L29/4908 , H01L29/66742 , H01L29/66765
Abstract: A thin film transistor and a fabrication method thereof, an array substrate, and a display device are provided. The fabrication method comprises: forming a gate line on a base substrate; performing a treatment for alleviating a bulge of the gate line on the base substrate with the gate line formed thereon, and forming a gate insulating layer on the base substrate after the treatment. Thereby, a problem of bulge of the gate line occurring in a fabrication process of the thin film transistor can be alleviated or even avoided, so that resistance of the gate line is uniform, which further renders uniform display of the display device, and improves display quality of the display device.
Abstract translation: 提供薄膜晶体管及其制造方法，阵列基板和显示装置。 制造方法包括：在基底基板上形成栅极线; 进行处理以减轻其上形成有栅极线的基底基板上的栅极线的凸起，以及在处理后在基底基板上形成栅极绝缘层。 由此，可以减轻或者避免在薄膜晶体管的制造工艺中产生的栅极线的凸起的问题，使得栅极线的电阻是均匀的，这进一步使得显示装置的显示均匀，并且改善显示 显示设备的质量。
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公开(公告)号：US20160005772A1
公开(公告)日：2016-01-07
申请号：US14852976
申请日：2015-09-14
Inventor： Bozhu ZHOU , Mingji BAI , Binbin CAO , Na ZHAO , Wenlong WANG , Yijun WANG
IPC: H01L27/12 , H01L21/3213 , H01L29/423
CPC classification number: H01L27/1259 , H01L21/3213 , H01L27/124 , H01L29/42356 , H01L29/42384 , H01L29/458 , H01L33/0041
Abstract: Embodiments of the invention provide an array substrate, a manufacturing method thereof and a display device. The array substrate comprises: a base substrate; a gate line and a gate electrode formed on the base substrate; a gate insulating layer formed on the gate line and the gate electrode; a source electrode, a drain electrode and a pixel electrode formed on the gate insulating layer, wherein the pixel electrode is directly connected to the drain electrode; and an active layer formed on the gate insulating layer, the source electrode and the drain electrode.
Abstract translation: 本发明的实施例提供阵列基板，其制造方法和显示装置。 阵列基板包括：基底; 形成在基底基板上的栅极线和栅电极; 形成在栅极线和栅电极上的栅极绝缘层; 形成在所述栅极绝缘层上的源电极，漏电极和像素电极，其中所述像素电极直接连接到所述漏电极; 以及形成在栅极绝缘层，源电极和漏电极上的有源层。
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Patent Agency Ranking
公开(公告)号：US20210173516A1
公开(公告)日：2021-06-10
申请号：US15780342
申请日：2017-11-20
Inventor： Binbin CAO , Ke CAO , Li AI
IPC: G06F3/044
Abstract: A touch substrate, a manufacturing method thereof and a display device. The touch substrate according to the embodiment of the present disclosure includes: a basal substrate; a touch electrode layer disposed on the basal substrate, the touch electrode layer comprising a plurality of touch electrodes; and a filler disposed between any two adjacent touch electrodes of the touch electrode layer. An orthographic projection of the filler on the basal substrate is at least partially located between orthographic projections of two adjacent touch electrodes on the basal substrate. A refractive index of the filler is n3, a refractive index of the basal substrate is n1, a refractive index of the touch electrode is n2, and |n2−n3|
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公开(公告)号：US20200225546A1
公开(公告)日：2020-07-16
申请号：US15776193
申请日：2017-10-20
Inventor： Tao JIANG , Yunhai WAN , Binbin CAO , Xianghua REN
IPC: G02F1/1362 , H01L27/12 , G02F1/1333
Abstract: The present disclosure provides an array substrate and a manufacturing method of the array substrate, a display device. An array substrate comprises: a pixel array, each pixel in the pixel array having a pixel electrode; a transistor array, each transistor in the transistor array having a source electrode; and a connection electrode for electrically connecting the pixel electrode to a corresponding source electrode.
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公开(公告)号：US20200035716A1
公开(公告)日：2020-01-30
申请号：US16396726
申请日：2019-04-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Bin ZHOU , Binbin CAO , Liangchen YAN , Dongfang WANG , Ce ZHAO , Luke DING , Jun LIU
IPC: H01L27/12
Abstract: The present disclosure is in the field of display technologies, and provides an array substrate including an IGZO film layer, a gate layer, and a gate insulating layer. The gate layer is provided with broken lines at a position thereof overlapping the IGZO film layer to form a first gate line and a second gate line. The gate insulating layer is disposed between the IGZO film layer and the gate layer, and is provided with at least two through holes thereon, in which the first gate line is connected with the IGZO film layer through one of the through holes, and the second gate line is connected with the IGZO film layer through another through hole, thus, connecting the IGZO film layer in series into the gate layer.
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公开(公告)号：US20190004351A1
公开(公告)日：2019-01-03
申请号：US15747694
申请日：2017-06-28
Inventor： Ke CAO , Chengshao YANG , Binbin CAO , Ling HAN
IPC: G02F1/1368 , H01L27/12 , H01L29/423 , H01L29/786 , G02F1/1339 , G02F1/1335 , G02F1/1362 , G02F1/1333
Abstract: A display panel, a manufacturing method thereof and a display device are provided. The display panel includes an array substrate and an opposing substrate which are disposed opposite to each other; the array substrate includes a first base substrate and a source electrode, a drain electrode and an active layer which are disposed on the first base substrate, and a passivation layer disposed on the source electrode, the drain electrode and the active layer; the opposing substrate includes a second base substrate and a gate electrode disposed on the second base substrate; the active layer includes a source electrode region, a drain electrode region and a channel region between the source electrode region and the drain electrode region, the gate electrode is disposed opposite to and spaced apart from the passivation layer at a position where the channel region is located.
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公开(公告)号：US20170139297A1
公开(公告)日：2017-05-18
申请号：US15108114
申请日：2016-01-06
Inventor： Binbin CAO , Peng JIANG , Peng CHEN , Jongwon MOON , Yinhu HUANG , Chengshao YANG , Haipeng YANG
IPC: G02F1/1362 , G02F1/1343 , G02F1/1368
CPC classification number: G02F1/136286 , G02F1/134363 , G02F1/13439 , G02F1/136209 , G02F1/1368 , G02F2001/133357 , G02F2001/136218 , G02F2001/136222 , G02F2001/13629 , G02F2001/136295 , G02F2201/121 , G02F2202/16 , H01L27/124 , H01L29/78633
Abstract: The present invention relates to a display substrate and a method for fabricating the same, a display panel and a display device. The display substrate comprises a plurality of pixels, each of which has a display region, a non-display region being between the plurality of pixels, and the display substrate further comprises a protection metal layer covering the non-display region. In the display substrate, the protection metal layer covers the non-display region of the display substrate so as to shield the structures of the thin-film transistors, signal lines and the like on the display substrate, and thus the stability of structure of the display panel as well as the high resolution of the display panel and excellent display effect thereof can be ensured, and, in the meantime, the procedure of fabrication process is simplified, the manufacture efficiency is improved, and the cost for manufacturing is reduced.
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