公开(公告)号：US09389173B2

公开(公告)日：2016-07-12

申请号：US14434187

申请日：2014-08-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hui Tian

IPC: H01L21/66 ,  H01L21/027 ,  G01N21/41 ,  G01N21/21 ,  H01L21/3105 ,  H01L21/3115

CPC classification number: G01N21/41 ,  G01N21/211 ,  G01N2201/0683 ,  H01L21/0273 ,  H01L21/31058 ,  H01L21/31155 ,  H01L22/12

Abstract: The present disclosure provides a method for detecting resistance of a photo resist layer. The method includes: providing a silicon wafer and measuring a refractive index of a surface of the silicon wafer as an initial refractive index of the surface of the silicon wafer; forming photo resist layers with different thicknesses on the surface of the silicon wafer; performing ion-implantation on the photo resist layers by predetermined amounts; peeling off the photo resist layers from the surface of the silicon wafer; and testing the refractive indexes of different areas on the surface of the silicon wafer after the ion-implantation, on which the photo resist layers with different thicknesses are located and determining the resistance of the photo resist layers with different thicknesses in contrast to the initial refractive index before the ion-implantation.

Abstract translation: 本公开提供了一种用于检测抗蚀剂层的电阻的方法。 该方法包括：提供硅晶片并测量硅晶片的表面的折射率作为硅晶片表面的初始折射率; 在所述硅晶片的表面上形成具有不同厚度的光致抗蚀剂层; 在光致抗蚀剂层上进行预定量的离子注入; 从硅晶片的表面剥离光致抗蚀剂层; 并且在离子注入之后测试在硅晶片的表面上的不同区域的折射率，其上具有不同厚度的光致抗蚀剂层位于其上，并且确定与初始折射率相反的不同厚度的光致抗蚀剂层的电阻 离子注入前的指数。

公开(公告)号：US09524852B2

公开(公告)日：2016-12-20

申请号：US14437046

申请日：2014-12-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hui Tian

IPC: H01L21/66 ,  H01J37/30 ,  H01J37/317

CPC classification number: H01J37/3005 ,  H01J37/3171 ,  H01J2237/2445 ,  H01J2237/31703 ,  H01J2237/31705 ,  H01J2237/31711

Abstract: A method for monitoring ion implantation, comprising: a), providing a control piece and forming a mask layer; b), performing ion implantation process to implant a predetermined dose of impurity ions into the control piece, an area on the control piece uncovered by the mask layer being an impurity implantation area and an area on the control piece covered by the mask layer being an impurity non-implantation area; c), peeling off the mask layer from the control piece; d), performing oxidation treatment on the control piece; and e), respectively measuring thicknesses of the oxide layers on the impurity implantation area and the impurity non-implantation area of the control piece, and monitoring the impurity dose of the ion implantation on the basis of a ratio of the thickness of the oxide layer in the impurity implantation area to the thickness of the oxide layer in the impurity non-implantation area. By this method, it is possible to accurately monitor whether or not the dose of the implanted ions meets the predetermined requirement, and it is possible to effectively avoid the defects of incorrect monitor result caused by the variation of the intrinsic resistance of the semiconductor, improve the accuracy of the monitoring, and thus improve the performance and yield rate of the device.

Abstract translation: 一种用于监测离子注入的方法，包括：a）提供控制件并形成掩模层; b），执行离子注入工艺以将预定剂量的杂质离子注入到控制件中，由掩模层未覆盖的作为杂质注入区域的控制片上的区域和由掩模层覆盖的控制片上的区域是 杂质非植入区; c）从掩模层剥离掩模层; d）对控制件执行氧化处理; 和e），分别测量所述杂质注入区域上的氧化物层的厚度和所述控制件的杂质非注入区域，并且基于所述氧化物层的厚度的比率来监测所述离子注入的杂质剂量 在杂质注入区域中的杂质非注入区域中的氧化物层的厚度。 通过该方法，可以准确地监视注入离子的剂量是否满足规定的要求，能够有效地避免半导体固有电阻的变化引起的监视结果不正确的缺陷，提高 监控的准确性，从而提高设备的性能和产出率。

公开(公告)号：US20180246227A1

公开(公告)日：2018-08-30

申请号：US15561760

申请日：2017-04-07

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiyuan WANG ,  Hui Tian ,  Yanzhao Li

IPC: G01T1/20 ,  G01T1/208 ,  G01T1/202

CPC classification number: G01T1/2018 ,  G01T1/202 ,  G01T1/2023 ,  G01T1/208

Abstract: A detection panel and a detection apparatus are provided. The detection panel includes: a cesium iodide scintillator layer, which is not doped with thallium; and a photoelectric detector, which is arranged on a light emission side of the cesium iodide scintillator layer and includes a semiconductor layer; a forbidden band width of a material for forming the semiconductor layer is greater than or equal to 2.3 eV.

公开(公告)号：US10002799B2

公开(公告)日：2018-06-19

申请号：US14422364

申请日：2014-05-07

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hui Tian ,  Lujiang Huangfu

IPC: H01L21/66 ,  H01J37/304 ,  H01J37/317 ,  H01L21/265

CPC classification number: H01L22/20 ,  H01J37/304 ,  H01J37/3171 ,  H01J2237/04756 ,  H01J2237/24542 ,  H01L21/265

Abstract: The present invention provides an improved ion implantation method and an ion implantation apparatus for performing the improved ion implantation method, belongs to the field of ion implantation technology, which can solve the problem of the poor stability and uniformity of the ion beam of the existing ion implantation apparatus. The improved ion implantation method of the invention comprises steps of: S1, detecting densities and beam distribution nonuniformities under various decelerating voltages; S2, determining an operation decelerating voltage based on the beam densities and the beam distribution nonuniformities; and S3, performing an ion implantation under the determined operation decelerating voltage. The present invention ensures the uniformity and stability of the ion beam, and thus ensures the uniformity of performances of the processed base materials in each batch or among various batches.

公开(公告)号：US09524991B2

公开(公告)日：2016-12-20

申请号：US14422343

申请日：2014-06-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wenqing Xu ,  Hui Tian ,  Xiaowei Xu

IPC: H01L27/12 ,  H01L27/32 ,  H01L29/786

CPC classification number: H01L27/1255 ,  H01L27/1222 ,  H01L27/1274 ,  H01L27/3265 ,  H01L29/78675

Abstract: An array substrate and a manufacturing method thereof, and a display apparatus comprising the array substrate are provided. The array substrate comprises a base substrate, and a thin film transistor and a storing capacitor provided on the base substrate, the thin film transistor comprises a gate, a source, a drain and a gate insulation layer provided between the source and drain and the gate, the storing capacitor comprises a first plate, a second plate and a dielectric layer provided between the first plate and the second plate, wherein, both of the first plate and the second plate are formed of metal material, and the dielectric layer is formed of the same material as the gate insulation layer. In the array substrate of the present invention, the charging speed of the storing capacitor can be improved and the display quality of the display apparatus comprising the array substrate is further improved.

Abstract translation: 提供阵列基板及其制造方法以及包括阵列基板的显示装置。 阵列基板包括基底基板和设置在基底基板上的薄膜晶体管和存储电容器，薄膜晶体管包括设置在源极和漏极与栅极之间的栅极，源极，漏极和栅极绝缘层 存储电容器包括设置在第一板和第二板之间的第一板，第二板和介电层，其中，第一板和第二板都由金属材料形成，并且介电层由 与栅极绝缘层相同的材料。 在本发明的阵列基板中，可以提高存储电容器的充电速度，并且进一步提高包括阵列基板的显示装置的显示质量。

公开(公告)号：US09279674B2

公开(公告)日：2016-03-08

申请号：US14376790

申请日：2013-11-19

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hui Tian

IPC: G01B15/02 ,  G03F7/20 ,  G01Q60/24

CPC classification number: G01B15/02 ,  G01Q60/24 ,  G03F7/20 ,  H01L21/266

Abstract: A method of testing a blocking ability of a photoresist blocking layer for ion implantation, comprising: forming a photoresist blocking layer (S1) on a substrate; measuring a first thickness (S2) of the photoresist blocking layer at an arbitrary position on the substrate, the first thickness being a thickness of the photoresist blocking layer; implanting a predetermined amount of ions (S3) into the photoresist blocking layer; measuring a second thickness (S4) of the photoresist blocking layer at the arbitrary position, the second thickness being a thickness of a hardened portion in the photoresist blocking layer; and determining a blocking ability (S5) of the photoresist blocking layer with the first thickness for ion implantation according to the second thickness. This method does not need to use a testing silicon slice during the process of testing the blocking ability of a photoresist blocking layer for ion implantation, and thus can reduce required costs during the testing process.

Abstract translation: 一种测试用于离子注入的光致抗蚀剂阻挡层的阻挡能力的方法，包括：在基底上形成光刻胶阻挡层（S1）; 测量所述光刻胶阻挡层在所述基板上的任意位置的第一厚度（S2），所述第一厚度为所述光致抗蚀剂阻挡层的厚度; 将预定量的离子（S3）注入到光刻胶阻挡层中; 测量任意位置处的光致抗蚀剂阻挡层的第二厚度（S4），第二厚度是光致抗蚀剂阻挡层中的硬化部分的厚度; 以及根据第二厚度确定具有用于离子注入的第一厚度的光致抗蚀剂阻挡层的阻挡能力（S5）。 在测试用于离子注入的光致抗蚀剂阻挡层的阻挡能力的过程中，该方法不需要使用测试硅片，因此可以在测试过程中降低所需的成本。

公开(公告)号：US20160061722A1

公开(公告)日：2016-03-03

申请号：US14434187

申请日：2014-08-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hui Tian

IPC: G01N21/41 ,  H01L21/027 ,  H01L21/3115 ,  H01L21/3105 ,  G01N21/21 ,  H01L21/66

CPC classification number: G01N21/41 ,  G01N21/211 ,  G01N2201/0683 ,  H01L21/0273 ,  H01L21/31058 ,  H01L21/31155 ,  H01L22/12

Abstract: The present disclosure provides a method for detecting resistance of a photo resist layer. The method includes: providing a silicon wafer and measuring a refractive index of a surface of the silicon wafer as an initial refractive index of the surface of the silicon wafer; forming photo resist layers with different thicknesses on the surface of the silicon wafer; performing ion-implantation on the photo resist layers by predetermined amounts; peeling off the photo resist layers from the surface of the silicon wafer; and testing the refractive indexes of different areas on the surface of the silicon wafer after the ion-implantation, on which the photo resist layers with different thicknesses are located and determining the resistance of the photo resist layers with different thicknesses in contrast to the initial refractive index before the ion-implantation.

Abstract translation: 本公开提供了一种用于检测抗蚀剂层的电阻的方法。 该方法包括：提供硅晶片并测量硅晶片的表面的折射率作为硅晶片表面的初始折射率; 在所述硅晶片的表面上形成具有不同厚度的光致抗蚀剂层; 在光致抗蚀剂层上进行预定量的离子注入; 从硅晶片的表面剥离光致抗蚀剂层; 并且在离子注入之后测试在硅晶片的表面上的不同区域的折射率，其上具有不同厚度的光致抗蚀剂层位于其上，并且确定与初始折射率相反的不同厚度的光致抗蚀剂层的电阻 离子注入前的指数。