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11.发明申请ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, DISPLAY PANEL AND DISPLAY DEVICE 有权阵列基板，其制造方法，显示面板和显示装置公开(公告)号：US20160197102A1
公开(公告)日：2016-07-07
申请号：US14804841
申请日：2015-07-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Liang SUN
IPC: H01L27/12 , H01L29/66 , H01L21/02 , H01L29/786
CPC classification number: H01L27/1222 , H01L21/02532 , H01L21/02592 , H01L21/02675 , H01L21/02686 , H01L27/1218 , H01L27/1262 , H01L27/1288 , H01L29/6675 , H01L29/78672
Abstract: The present disclosure provides an array substrate, a manufacturing method thereof, a display panel and a display device. A base substrate of the array substrate or a buffer layer on the base substrate is provided with a plurality of recessed sections, each recessed section is provided with at least one inclined surface, and a thin film transistor (TFT) is arranged at the inclined surface of each recessed section. The recessed sections are divided into at least two types. In the recessed sections of different types, angles between a horizontal surface of the array substrate and the inclined surfaces on which the TFTs are arranged are different from each other.
Abstract translation: 本公开提供了阵列基板，其制造方法，显示面板和显示装置。 阵列基板的基底或基底基板上的缓冲层设置有多个凹部，每个凹部具有至少一个倾斜面，在该倾斜面配置有薄膜晶体管（TFT） 每个凹进部分。 凹陷部分分为至少两种类型。 在不同类型的凹部中，阵列基板的水平表面与其上布置TFT的倾斜表面之间的角度彼此不同。
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12.发明公开公开(公告)号：US20240304762A1
公开(公告)日：2024-09-12
申请号：US18026332
申请日：2022-04-26
Inventor： Yutian CHU , Sha FENG , Zhijun XIONG , Yuanda LU , Liang SUN , Zhaohui LI , Enkai DONG , Jiacheng QI , Jinpeng LI , Qiqi ZHOU , Le WANG
CPC classification number: H01L33/46 , H01L33/62 , H01L2933/0025 , H01L2933/0066
Abstract: Provided are a light-emitting chip, a light-emitting substrate, a display device, and a manufacturing method for a light-emitting substrate. The light-emitting chip includes: a substrate; a light-emitting structure, the light-emitting structure disposed on a side of the substrate; a reflective layer disposed on a side, facing away from the substrate, of the light-emitting structure; at least two sub-light-emitting auxiliary bonding layers disposed on a side, facing away from the light-emitting structure, of the reflective layer; and a raised portion, disposed on a side, facing away from the light-emitting structure, of the reflective layer, an orthographic projection of the raised portion on the substrate and an orthographic projection of the sub-light-emitting auxiliary bonding layers on the substrate do not overlap with each other, and a thickness of the raised portion is smaller than a thickness of each of the at least two sub-light-emitting auxiliary bonding layers.
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公开(公告)号：US20210233969A1
公开(公告)日：2021-07-29
申请号：US17230146
申请日：2021-04-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Liang SUN , Tuo SUN , Xiaodan JIN , Lintao ZHANG
Abstract: A display panel, including: a plurality of pixels arranged in an array in a first direction and a second direction intersecting the first direction, each pixel including: a first sub-pixel having a first light-emitting zone configured to emit light of a first color; a second sub-pixel having a second light-emitting zone configured to emit light of a second color; and a third sub-pixel having a third light-emitting zone configured to emit light of a third color, wherein the plurality of pixels include a first pixel, the first light-emitting zone of the first pixel has a substantially polygonal shape, the substantially polygonal shape including: a first side substantially parallel to one side of the second light-emitting zone of the first pixel, and the one side of the second light-emitting zone of the first pixel being opposite to the first light-emitting zone; and a second side substantially parallel to one side of the third light-emitting zone of the first pixel, and the one side of the third light-emitting zone of the first pixel being opposite to the first light-emitting zone.
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公开(公告)号：US20160293637A1
公开(公告)日：2016-10-06
申请号：US15177795
申请日：2016-06-09
Inventor： Jinchao BAI , Yao LIU , Liangliang LI , Zhaohui HAO , Liang SUN
IPC: H01L27/12 , G02F1/1362 , G02F1/1368 , H01L23/31 , G02F1/1333
CPC classification number: H01L27/124 , G02F1/133345 , G02F1/1345 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/134318 , G02F2201/121 , G02F2201/123 , G02F2201/40 , H01L23/3171 , H01L27/1214 , H01L27/1218 , H01L27/1248
Abstract: An array substrate, a method for manufacturing the same and a display apparatus are provided. The array substrate comprises: a substrate (1); a common electrode (2) and a pixel electrode (10) sequentially formed on the substrate (1) and insulated from each other; a thin film transistor comprising a gate electrode (4), an active layer (7), a source electrode (8a) and a drain electrode (8b), wherein the drain electrode (8b) is electrically connected with the pixel electrode (10); a common electrode line (5) disposed in a same layer as the gate electrode (4); and an insulating layer (3) between the gate electrode (4) and the common electrode (2), wherein the common electrode (2) is connected with the common electrode line (5) through a through hole in the insulating layer (3).
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公开(公告)号：US20160096189A1
公开(公告)日：2016-04-07
申请号：US14369381
申请日：2013-04-02
Inventor： Shoukun WANG , Liang SUN
IPC: B05C9/02
Abstract: A film-margin adjuster, including: four shielding plates, for shielding an area of the peripheral edge-portions of a film-formation substrate respectively; the four shielding plates are oppositely disposed in pairs, and at least one pair of the oppositely disposed shielding plates has a adjustable relative distance therebetween. The film-margin adjuster, by virtue of the at least one pair of the oppositely disposed shielding plates having an adjustable relative distance therebetween, can adjust the area of the peripheral edge-portions of the film-formation substrate shielded by the shielding plates, thus achieving adjustment of the size of film-margin, and improving yield of production line.
Abstract translation: 一种胶片边缘调节器，包括：四个屏蔽板，用于分别屏蔽成膜基材的周边部分的区域; 四个屏蔽板成对地相对设置，并且至少一对相对设置的屏蔽板之间具有可调节的相对距离。 薄膜边缘调节器由于至少一对相对设置的屏蔽板之间具有可调节的相对距离，可以调节由屏蔽板屏蔽的成膜基板的周边边缘部分的面积，从而 实现电影幅度调整，提高生产线产量。
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Patent Agency Ranking
公开(公告)号：US20140134809A1
公开(公告)日：2014-05-15
申请号：US14077770
申请日：2013-11-12
Inventor： Jinchao BAI , Liang SUN , Xiangqian DING , Liangliang LI , Yao LIU
IPC: H01L27/12
CPC classification number: H01L27/1288 , H01L27/124 , H01L27/127 , H01L29/66765
Abstract: A method for manufacturing fan-out lines on an array substrate is disclosed. The fan-out lines comprise an amorphous silicon layer, an ohmic contact layer and a source-drain electrode layer disposed on a gate insulating layer. The manufacturing processes can be conducted by forming a first layer of photoresist on the source-drain electrode layer and performing a half-exposure development process on the first layer of photoresist; etching the amorphous silicon layer, the ohmic contact layer and the source-drain electrode layer by an etching process; removing the first layer of photoresist; foiming a second layer of photoresist and performing full-exposure development process on the second layer of photoresist; and etching the amorphous silicon layer by etching process to form the fan-out lines.
Abstract translation: 公开了一种在阵列基板上制造扇出线的方法。 扇出线包括非晶硅层，欧姆接触层和设置在栅极绝缘层上的源极 - 漏极电极层。 可以通过在源极 - 漏极电极层上形成第一层光致抗蚀剂并在第一层光致抗蚀剂上进行半曝光显影处理来进行制造工艺; 通过蚀刻工艺蚀刻非晶硅层，欧姆接触层和源极 - 漏极电极层; 去除第一层光刻胶; 在第二层光致抗蚀剂上形成第二层光致抗蚀剂并进行全曝光显影处理; 并通过蚀刻工艺蚀刻非晶硅层以形成扇出线。
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公开(公告)号：US20180212201A1
公开(公告)日：2018-07-26
申请号：US15321576
申请日：2015-12-14
Inventor： Juanjuan BAI , Weilin LAI , Minghua XUAN , Liang SUN
Abstract: This disclosure provides an OLED light-emitting device, a production method thereof as well as a display apparatus, and relates to the technical field of OLED display, which can enhance the internal quantum efficiency of a blue OLED light-emitting device. This OLED light-emitting device comprises a substrate, and an anode, a hole transport layer, a blue light-emitting layer and a cathode provided on the substrate; the OLED light-emitting device further comprises an Ag nanolayer located between the anode and the hole transport layer; wherein the blue light-emitting layer is a blue phosphorescent light-emitting layer; the absorption spectrum of the Ag nanolayer overlaps the emission spectrum of the blue phosphorescent light-emitting layer, and the blue phosphorescent light-emitting layer is located within the penetration depth of surface plasma of Ag nanoparticles in the Ag nanolayer. It is used in the production of a blue OLED light-emitting device and a display apparatus comprising the same.
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公开(公告)号：US20180188864A1
公开(公告)日：2018-07-05
申请号：US15701673
申请日：2017-09-12
Inventor： Kuohai WANG , Liang SUN , Hongliang XU , Liyong GUO , Libin MIAO , Zhenning FAN
IPC: G06F3/041
CPC classification number: G06F3/0412 , G06F3/0416 , G06F11/2221 , G06F2203/04103 , G09G3/006 , G09G3/20 , G09G2300/0408
Abstract: A touch display screen testing method and a touch display screen testing device are provided. The method includes: applying a direct current signal to a gate driving circuit of the touch display screen to turn on gate electrodes of the touch display screen simultaneously, to detect a display defect of the touch display screen, in a first testing stage of an electric performance testing process at a Cell stage of a touch display screen.
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公开(公告)号：US20170302265A1
公开(公告)日：2017-10-19
申请号：US15122389
申请日：2015-04-09
Inventor： Jun WANG , Xinxin JIN , Liang SUN , Yuebai HAN , Guoqing ZHANG
IPC: H03K17/16 , G09G3/3233
CPC classification number: H03K17/16 , G09G3/006 , G09G3/3233 , G09G2300/0819 , G09G2300/0833 , G09G2300/0861 , G09G2310/0254 , G09G2310/0289 , G09G2310/08 , G09G2320/0214
Abstract: The present disclosure relates to a method of electrically aging a PMOS thin film transistor. The method includes applying a first voltage Vg with an amplitude of A volts to a gate of the PMOS thin film transistor; applying a second voltage Vs with an amplitude of (A-40) to (A-8) volts to a source of the PMOS thin film transistor; and applying a third voltage Vd with an amplitude of (A-80) to (A-16) volts to a drain of the PMOS thin film transistor. Application of the first voltage Vg, the second voltage Vs and the third voltage Vd is maintained for a predetermined time period, and Vd−Vs
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20.发明申请公开(公告)号：US20170170423A1
公开(公告)日：2017-06-15
申请号：US15039639
申请日：2015-11-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Liang SUN
CPC classification number: H01L51/5221 , H01L27/3244 , H01L27/3246 , H01L51/0021 , H01L51/5225 , H01L51/524 , H01L51/5246 , H01L51/525 , H01L2251/558
Abstract: An OLED array substrate and a method for manufacturing the same, an OLED packaging structure and a display device are provided by the present disclosure. The OLED array substrate includes thin film transistors, anodes, cathodes and organic light-emitting layers arranged between the anodes and the cathodes. The OLED array substrate further includes spacers configured to support the OLED array substrate and a packaging substrate so as to form a cell gap therebetween. Each cathode includes a first region which covers the corresponding first spacer and a second region beyond the first regions, and a thickness of the cathode at the first region is larger than a thickness of the cathode at the second region.
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