公开(公告)号：US12183748B2

公开(公告)日：2024-12-31

申请号：US18518526

申请日：2023-11-23

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ke Wang ,  Muxin Di ,  Zhiwei Liang ,  Guoqiang Wang ,  Renquan Gu ,  Xiaoxin Song ,  Xiaoyan Zhu ,  Yingwei Liu ,  Zhanfeng Cao

IPC: H01L27/12

Abstract: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.

公开(公告)号：US20240047363A1

公开(公告)日：2024-02-08

申请号：US17762239

申请日：2021-05-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yang Yue ,  Shi Shu ,  Qi Yao ,  Yong Yu ,  Shipei Li ,  Xiang Li ,  Chuanxiang Xu ,  Wenqu Liu ,  Renquan Gu ,  Haitao Huang

IPC: H01L23/538 ,  H01L25/075 ,  H01L21/48

CPC classification number: H01L23/5383 ,  H01L25/0753 ,  H01L21/4857

Abstract: A manufacturing method of a displaying base plate, a displaying base plate and a displaying apparatus. The displaying base plate includes an active area and a peripheral area located at a periphery of the active area. The displaying base plate includes: a substrate; a wiring functional layer disposed on one side of the substrate, wherein the wiring functional layer includes a metal wiring and bonding terminals connected to the metal wiring), the bonding terminals include a first bonding terminal, a second bonding terminal and a third bonding terminal, the first bonding terminal and the second bonding terminal are located at the active area, and the third bonding terminal is located at the peripheral area; a first passivation layer disposed on one side of the wiring functional layer that is away from the substrate; and a light shielding layer disposed on one side of the first passivation layer that is away from the substrate.

公开(公告)号：US11785825B2

公开(公告)日：2023-10-10

申请号：US17210733

申请日：2021-03-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Haitao Huang ,  Shi Shu ,  Qi Yao ,  Chuanxiang Xu ,  Zhao Cui ,  Lina Jing ,  Renquan Gu ,  Yong Yu

IPC: H10K59/38 ,  H10K50/854 ,  H10K50/856 ,  H10K50/86 ,  H10K59/12 ,  H10K102/00

CPC classification number: H10K59/38 ,  H10K50/854 ,  H10K50/856 ,  H10K50/865 ,  H10K59/12 ,  H10K2102/331

Abstract: A display panel is provided with a plurality of sub-pixel areas and includes: a base substrate, a light emitting structure including a plurality of light emitting devices corresponding to the sub-pixel areas, an encapsulating layer, and a pixel defining layer. The pixel defining layer includes: a plurality of openings; at least two sub-pixel defining layers, and a quantum dot color film layer. Each of the sub-pixel defining layers is provided with a pixel separator. The pixel separators fence each of the plurality of openings, and define the plurality of sub-pixel areas. In the at least two sub-pixel defining layers, the sectional shape of the pixel separator in the sub-pixel defining layer which is farthest away from the encapsulating layer includes a regular trapezoid. The quantum dot color film layer includes a plurality of quantum dot color films arranged in the corresponding openings.

公开(公告)号：US20230049038A1

公开(公告)日：2023-02-16

申请号：US17975894

申请日：2022-10-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Renquan Gu ,  Qi Yao ,  Jaiil Ryu ,  Zhiwei Liang ,  Yingwei Liu ,  Wusheng Li ,  Muxin Di

IPC: H01L27/32

Abstract: An array substrate and a manufacturing method thereof, a display device and a manufacturing method thereof are provided, which belong to the technical field of display. The array substrate includes: an interposer substrate, a fan-out region and a thin-film transistor disposed on one side of the interposer substrate, and a bonding connection line disposed on the other side of the interposer substrate. The bonding connection line includes a first lead and a second lead that are insulated from each other. The interposer substrate is provided with a first interposer via hole and a second interposer via hole. The first lead is electrically connected to the thin-film transistor by a conductive structure in the first interposer via hole and the fan-out region, and the second lead is electrically connected to the thin-film transistor by a conductive structure in the second interposer via hole and the fan-out region.

公开(公告)号：US20220317513A1

公开(公告)日：2022-10-06

申请号：US17419685

申请日：2020-09-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Haitao Huang ,  Shi Shu ,  Chuanxiang Xu ,  Liuqing Li ,  Zhao Cui ,  Renquan Gu

IPC: G02F1/1335 ,  G02F1/1343 ,  G02F1/1368 ,  H01L27/32 ,  H01L51/56 ,  G03F7/00 ,  C23C16/26 ,  C23C16/50

Abstract: A display panel is provided. The display panel includes a bank layer and a quantum dots material layer on a base substrate. The bank layer defines a plurality of bank apertures. The quantum dots material layer includes a plurality of quantum dots blocks respectively in at least some of the plurality of bank apertures. At least a portion of the bank layer between two adjacent bank apertures includes a first surface, a second surface opposite to the first surface, a third surface connecting the first surface and the second surface closer to a first bank aperture, and a fourth surface connecting the first surface and the second surface closer to a second bank aperture. At least a portion of a third surface or a fourth surface of a portion of the bank layer between two adjacent bank apertures is a wavy surface including alternating convex and concave portions.

公开(公告)号：US20200091246A1

公开(公告)日：2020-03-19

申请号：US16574055

申请日：2019-09-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shipei Li ,  Wusheng Li ,  Qi Yao ,  Dongsheng Li ,  Fang He ,  Huili Wu ,  Renquan Gu ,  Sheng Xu ,  Wei He ,  Dongsheng Yin ,  Ying Zhao

IPC: H01L27/30 ,  H01L51/00 ,  H01L51/44

Abstract: A photosensitive sensor and a method of manufacturing the photosensitive sensor are disclosed. The photosensitive sensor includes a thin film transistor and a photosensitive element on a substrate, wherein the photosensitive element includes a first electrode, a second electrode, and a photosensitive layer between the first electrode and the second electrode. The second electrode is connected to a drain electrode of the thin film transistor. An orthographic projection of an active layer of the thin film transistor on the substrate is within an orthographic projection of the second electrode on the substrate. The second electrode includes at least two stacked conductive layers, at least one of the at least two stacked conductive layers being a light shielding metal layer.

公开(公告)号：US12265236B2

公开(公告)日：2025-04-01

申请号：US17637667

申请日：2021-04-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Kang Guo ,  Feng Zhang ,  Haitao Huang ,  Renquan Gu ,  Mengya Song ,  Duohui Li ,  Song Liu ,  Xin Gu ,  Guangcai Yuan ,  Xue Dong

IPC: G02B5/00 ,  G02B3/00 ,  G02B7/02 ,  G02B27/02 ,  G02B27/18

Abstract: The present disclosure relates to the field of display technology, and provides an optical module, a manufacturing method thereof, and a display device. The optical module includes: a substrate; a black matrix arranged on the substrate and a plurality of optical lenses spaced apart from each other, wherein an orthogonal projection of a gap between adjacent optical lenses onto the substrate is located within an orthogonal projection of the black matrix onto the substrate, and the black matrix is made of a ferrous metal oxide.

公开(公告)号：US12197068B2

公开(公告)日：2025-01-14

申请号：US17785595

申请日：2021-08-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Renquan Gu ,  Libo Wang ,  Detian Meng ,  Feng Zhang ,  Shiyu Zhang ,  Yujie Liu ,  Qi Yao

IPC: G02F1/1335 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  G03F7/00

Abstract: An embodiment of the present disclosure provides a display substrate. The display substrate includes a driver backplane, and a reflective structure and a pixel electrode on the driver backplane. Reflective structure and the pixel electrode are disposed sequentially away from the driver backplane along a thickness direction of the driver backplane. The pixel electrode is connected to the driver backplane through the reflective structure. A surface of the reflective structure away from the driver backplane is a reflective surface comprising a plurality of arc surfaces, and each of the plurality of arc surfaces is convex protruding towards a direction away from the driver backplane. The plurality of the arc surfaces are continuously arranged, and any two adjacent arc surfaces of the plurality of the arc surfaces are connected to each other.

公开(公告)号：US12062744B2

公开(公告)日：2024-08-13

申请号：US16975771

申请日：2019-10-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Muxin Di ,  Ke Wang ,  Guoqiang Wang ,  Zhiwei Liang ,  Renquan Gu ,  Yingwei Liu ,  Qi Yao ,  Zhanfeng Cao

IPC: H01L33/62 ,  H01L33/00 ,  H01L33/38

CPC classification number: H01L33/62 ,  H01L33/005 ,  H01L33/387 ,  H01L2933/0016 ,  H01L2933/0066

Abstract: The present disclosure relates to a display substrate, a display device, and a method for manufacturing a display substrate. The display substrate includes a base substrate having a first side and a second side opposite to the first side, a via provided in the base substrate, a thin film transistor provided on the first side of the base substrate, a first conductive structure provided on the first side of the base substrate, wherein a first sub-portion of the first conductive structure is located in the via, and wherein a material of the first conductive structure is the same as a material of a source/drain electrode of the thin film transistor.

公开(公告)号：US11994696B2

公开(公告)日：2024-05-28

申请号：US17483530

申请日：2021-09-23

Applicant: BOE Technology Group Co., Ltd.

Inventor： Kang Guo ,  Renquan Gu ,  Xin Gu ,  Feng Zhang ,  Meili Wang ,  Guangcai Yuan ,  Xue Dong ,  Mengya Song ,  Duohui Li ,  Qi Yao ,  Jing Yu

IPC: G02B30/27 ,  H04N13/305

CPC classification number: G02B30/27 ,  H04N13/305

Abstract: Embodiments of the present application disclose a method for manufacturing a naked-eye 3D device and a naked-eye 3D device. The method includes: forming a display module including a plurality of pixel islands; forming a spacer layer on the display module; and forming a micro-lens array on the spacer layer, wherein the spacer layer is formed to have a thickness such that the plurality of pixel islands are located at a focal plane of the micro-lens array. The method further includes: forming an alignment mark between the spacer layer and the display module, wherein the alignment mark is used for, when forming the micro-lens array, aligning each micro-lens in the micro-lens array with one of the plurality of pixel islands.