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218 条记录 (耗时 0.031 秒)

    Transistors, methods of manufacturing a transistor, and electronic devices including a transistor
    15.
    发明申请
    Transistors, methods of manufacturing a transistor, and electronic devices including a transistor 有权
    晶体管，制造晶体管的方法以及包括晶体管的电子器件

    公开(公告)号：US20110175080A1

    公开(公告)日：2011-07-21

    申请号：US12805648

    申请日：2010-08-11

    申请人： Sun-il Kim ,  Jae-chul Park ,  Sang-wook Kim ,  Young-soo Park ,  Chang-jung Kim

    发明人： Sun-il Kim ,  Jae-chul Park ,  Sang-wook Kim ,  Young-soo Park ,  Chang-jung Kim

    IPC分类号： H01L29/12 ,  H01L29/78 ,  H01L21/16

    CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969 ,  H01L29/78606

    摘要： Transistors, methods of manufacturing a transistor, and electronic devices including a transistor are provided, the transistor includes a channel layer, a source and a drain respectively contacting opposing ends of the channel layer, a gate corresponding to the channel layer, a gate insulating layer between the channel layer and the gate, and a first passivation layer and a second passivation layer sequentially disposed on the gate insulating layer. The first passivation layer covers the source, the drain, the gate, the gate insulating layer and the channel layer. The second passivation layer includes fluorine (F).

    摘要翻译： 提供晶体管，制造晶体管的方法和包括晶体管的电子器件，晶体管包括沟道层，分别接触沟道层的相对端的源极和漏极，对应于沟道层的栅极，栅极绝缘层 在沟道层和栅极之间，以及顺序地设置在栅极绝缘层上的第一钝化层和第二钝化层。 第一钝化层覆盖源极，漏极，栅极，栅极绝缘层和沟道层。 第二钝化层包括氟（F）。

    Transistor and method of manufacturing the same
    16.
    发明申请
    Transistor and method of manufacturing the same 有权
    晶体管及其制造方法

    公开(公告)号：US20090224238A1

    公开(公告)日：2009-09-10

    申请号：US12289252

    申请日：2008-10-23

    申请人： Sun-il Kim ,  Young-soo Park ,  I-hun Song ,  Chang-jung Kim ,  Jae-chul Park ,  Sang-wook Kim

    发明人： Sun-il Kim ,  Young-soo Park ,  I-hun Song ,  Chang-jung Kim ,  Jae-chul Park ,  Sang-wook Kim

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869

    摘要： A transistor according to example embodiments may include a channel layer, a source and a drain respectively contacting ends of the channel layer, a gate electrode separated from the channel layer, a gate insulating layer interposed between the channel layer and the gate electrode, and/or an insertion layer that is formed between the channel layer and the gate insulating layer. The insertion layer may have a work function different from that of the channel layer.

    摘要翻译： 根据示例实施例的晶体管可以包括沟道层，分别接触沟道层的端部的源极和漏极，与沟道层分离的栅电极，介于沟道层和栅电极之间的栅极绝缘层和/ 或形成在沟道层和栅极绝缘层之间的插入层。 插入层可以具有与沟道层不同的功函数。

    Stacked memory device and method thereof
    19.
    发明授权
    Stacked memory device and method thereof 有权
    堆叠式存储器件及其方法

    公开(公告)号：US08547719B2

    公开(公告)日：2013-10-01

    申请号：US12588275

    申请日：2009-10-09

    申请人： Jae-chul Park ,  Kee-won Kwon ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim ,  Sang-wook Kim ,  Sun-il Kim

    发明人： Jae-chul Park ,  Kee-won Kwon ,  I-hun Song ,  Young-soo Park ,  Chang-jung Kim ,  Sang-wook Kim ,  Sun-il Kim

    IPC分类号： G11C5/02

    CPC分类号： G11C5/02 ,  G11C5/143 ,  G11C7/18 ,  G11C8/12 ,  G11C13/0023 ,  G11C2213/71

    摘要： A stacked memory device includes a plurality of memory layers, where at least one of the plurality of memory layers is stacked on another of the plurality of memory layers and each of the memory layers includes an array of memory cells, a first active circuit unit configured to classify and process address information for at least one of the memory cells as vertical address information and horizontal address information, and at least one second active circuit unit configured to generate a memory selection signal for at least one of the memory cells based on signals processed by the first active circuit unit.

    摘要翻译： 堆叠存储器件包括多个存储器层，其中多个存储器层中的至少一个堆叠在多个存储器层中的另一个上，并且每个存储器层包括存储器单元阵列，第一有源电路单元配置 将至少一个存储器单元的地址信息分类并处理为垂直地址信息和水平地址信息，以及至少一个第二有源电路单元，配置为基于处理的信号为存储器单元中的至少一个生成存储器选择信号 由第一有源电路单元。