公开(公告)号：US20050269482A1

公开(公告)日：2005-12-08

申请号：US10863058

申请日：2004-06-08

Applicant: Peter Hopper ,  Philipp Lindorfer ,  Mark Poulter ,  Yuri Mirgorodski

Inventor： Peter Hopper ,  Philipp Lindorfer ,  Mark Poulter ,  Yuri Mirgorodski

IPC: H01L27/146 ,  H04N5/353 ,  H04N5/361 ,  H04N5/3745 ,  H01L27/00

CPC classification number: H01L27/14609 ,  H04N5/35572 ,  H04N5/361 ,  H04N5/37452

Abstract: An active pixel sensor cell including at least one photodiode and reset circuitry and an integrating varactor coupled to the photodiode, a method for reading out such a cell, and an image sensor including an array of such cells. The photodiode can be exposed to photons during an exposure interval to accumulate a sequence of subexposure charges at a first node of the photodiode. Each of the subexposure charges accumulates at the first node during a different subexposure interval of the exposure interval. The photodiode is reset during each of a sequence of reset intervals, each reset interval occurring before a different one of the subexposure intervals. An output signal indicative of an exposure charge accumulated at the storage node during the exposure interval can be asserted from the cell, where the exposure charge is indicative of a sum of all the subexposure charges.

Abstract translation: 包括至少一个光电二极管和复位电路的有源像素传感器单元和耦合到光电二极管的积分变容二极管，用于读出这样的单元的方法以及包括这种单元阵列的图像传感器。 在曝光间隔期间，可以将光电二极管暴露于​​光子，以在光电二极管的第一节点处累积次曝光电荷序列。 在曝光间隔的不同子曝光间隔期间，每个次曝光电荷在第一节点处累积。 在每个复位间隔的每一个期间复位光电二极管，每个复位间隔发生在不同的次曝光间隔之前。 指示在曝光间隔期间在存储节点处累积的曝光电荷的输出信号可以从单元断言，其中曝光电荷指示所有次曝光电荷的总和。

公开(公告)号：US06798641B1

公开(公告)日：2004-09-28

申请号：US10647602

申请日：2003-08-25

Applicant: Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Andrew Strachan

Inventor： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Andrew Strachan

IPC: H01G4228

CPC classification number: H01L27/0805 ,  H01L29/92

Abstract: A multiple-layer diffusion junction capacitor structure includes multiple layers of inter-digitated P-type dopant and N-type dopant formed in a semiconductor substrate. An opening in a hard mask is formed taking care to control the angle of the sidewall using a dry, anisotropic etching process. P-type and N-type dopant are then implanted at positive and negative shallow angles, respectively, each with a different energy and dose. By utilizing the properly determined implant angles, implant energies and implant doses for each of the dopant types, a high capacitance and high density diode junction capacitor, with inter-digitated N-type and P-type regions in the vertical direction is provided.

Abstract translation: 多层扩散结电容器结构包括在半导体衬底中形成的多层数字化P型掺杂剂和N型掺杂剂。 形成硬掩模的开口，其中形成了使用干燥的各向异性蚀刻工艺来控制侧壁的角度。 然后分别以正和负的浅角度注入P型和N型掺杂剂，每种具有不同的能量和剂量。 通过利用适当确定的植入角度，提供每种掺杂剂类型的注入能量和注入剂量，高电容和高密度二极管结电容器，在垂直方向上具有数字化的N型和P型区域。

公开(公告)号：US06660537B1

公开(公告)日：2003-12-09

申请号：US10219211

申请日：2002-08-15

Applicant: Peter J. Hopper ,  Philipp Lindorfer ,  Kyuwoon Hwang

Inventor： Peter J. Hopper ,  Philipp Lindorfer ,  Kyuwoon Hwang

IPC: H01L2100

CPC classification number: H01L31/103 ,  H01L27/14609 ,  H01L31/102

Abstract: A conductive trace is formed over and insulated from a region of semiconductor material, such as a region adjacent to the n+ region of an n+/p− photodiode, and a sawtooth current is made to flow through the conductive trace. The sawtooth current induces charge carriers to move through the semiconductor material to a collection region in the semiconductor material.

Abstract translation: 导电迹线形成在与半导体材料的区域（例如与n + / p-型光电二极管的n +区域相邻的区域）之上并与之绝缘，并且使锯齿电流流过导电迹线。 锯齿电流引起电荷载流子移动通过半导体材料到半导体材料中的收集区域。

公开(公告)号：US08554529B2

公开(公告)日：2013-10-08

申请号：US11998478

申请日：2007-11-30

Applicant: Yuri Mirgorodski ,  Peter J. Hopper ,  William French ,  Philipp Lindorfer

Inventor： Yuri Mirgorodski ,  Peter J. Hopper ,  William French ,  Philipp Lindorfer

IPC: G06F17/50

CPC classification number: G06F17/5036

Abstract: A method of simulating an integrated circuit device under test (DUT) is provided, wherein the DUT includes a plurality of terminals. For each terminal of the DUT, a probe pulse is applied to the terminal and a reaction is recorded at the terminal and each of the other terminals to obtain values representative of reactive tails for the terminal. For each terminal, the values representative of the reactive tails obtained for the terminal are stored as an entry of a look-up table. Each entry includes n+x fields, wherein n represents a number of arguments in the entry and x represents a number of functions in the entry. For each terminal, a signal value at a selected time step is calculated.

Abstract translation: 提供了一种模拟被测集成电路器件（DUT）的方法，其中DUT包括多个端子。 对于DUT的每个端子，将探头脉冲施加到端子，并且在端子和每个其他端子处记录反应以获得表示端子的反应尾部的值。 对于每个终端，代表为终端获得的反应式尾部的值被存储为查找表的条目。 每个条目包括n + x个字段，其中n表示条目中的参数数，x表示条目中的一些函数。 对于每个终端，计算所选时间步长处的信号值。

公开(公告)号：US20130015850A1

公开(公告)日：2013-01-17

申请号：US13182510

申请日：2011-07-14

Applicant: Philipp Lindorfer ,  Peter J. Hopper ,  William French ,  Paul Mawson ,  Steven Hunt ,  Roozbeh Parsa

Inventor： Philipp Lindorfer ,  Peter J. Hopper ,  William French ,  Paul Mawson ,  Steven Hunt ,  Roozbeh Parsa

IPC: G01R33/02 ,  H01L43/12 ,  H01L31/02 ,  G01N21/59 ,  H01L29/02 ,  H01L21/50 ,  H01S3/02 ,  G01J1/42 ,  H01L29/82 ,  H01L31/18

CPC classification number: G01R33/0052 ,  G01J1/4228 ,  G01J1/44 ,  G01J5/20 ,  G01R33/032 ,  H01L31/18 ,  H01L43/12 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2224/19 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2924/15153 ,  H01S5/0208 ,  H01S5/0222 ,  H01S5/026 ,  H01S5/0261 ,  H01S5/0262 ,  H01S5/183

Abstract: The cost and size of an atomic magnetometer are reduced by attaching together a first die which integrates together a vapor cell, top and side photo detectors, and processing electronics, a second die which integrates together an optics package and a heater for the vapor cell, and a third die which integrates together a VCSEL, a heater for the VCSEL, and control electronics.

Abstract translation: 原子磁强计的成本和尺寸通过将集成在一起的蒸气单元，顶部和侧面光电检测器以及处理电子器件的第一模具连接在一起来降低，第二模具将光学组件和用于蒸气室的加热器集成在一起， 以及将VCSEL，VCSEL的加热器和控制电子器件集成在一起的第三管芯。

公开(公告)号：US20090144035A1

公开(公告)日：2009-06-04

申请号：US11998478

申请日：2007-11-30

Applicant: Yuri Mirgorodski ,  Peter J. Hopper ,  William French ,  Philipp Lindorfer

Inventor： Yuri Mirgorodski ,  Peter J. Hopper ,  William French ,  Philipp Lindorfer

IPC: G06G7/48

CPC classification number: G06F17/5036

Abstract: A modified “black box” integrated circuit simulation model is provided that is based only upon on the external steady-state and transient characteristics of a device under test (DUT). The method utilizes probe pulses as well as steady-state I-V and C-V look-up tables. In contrast to conventional black box simulation models, which support only steady-state and small signal frequency analysis, the disclosed method also supports large signal transient analysis.

Abstract translation: 提供了一种基于被测器件（DUT）的外部稳态和瞬态特性的改进的“黑匣子”集成电路仿真模型。 该方法利用探头脉冲以及稳态I-V和C-V查找表。 与仅支持稳态和小信号频率分析的常规黑盒仿真模型相反，所公开的方法还支持大信号瞬态分析。

公开(公告)号：US07238553B1

公开(公告)日：2007-07-03

申请号：US11134911

申请日：2005-05-23

Applicant: Vladislav Vashchenko ,  Andy Strachan ,  Peter J. Hopper ,  Philipp Lindorfer

Inventor： Vladislav Vashchenko ,  Andy Strachan ,  Peter J. Hopper ,  Philipp Lindorfer

IPC: H01L21/332

CPC classification number: H01L27/0248 ,  H01L29/7436

Abstract: When a high-voltage, such as from an ESD pulse, is placed across a silicon controlled rectifier, which includes an NPN transistor and a PNP transistor that is connected to the NPN transistor, the likelihood of punch through occurring between two regions of the rectifier is substantially reduced by forming the emitter of one transistor adjacent to the tails of the sinker down region of the other transistor.

Abstract translation: 当诸如ESD脉冲之类的高压被放置在包括NPN晶体管和连接到NPN晶体管的PNP晶体管的可控硅整流器上时，整流器的两个区域之间产生冲击的可能性 通过形成一个晶体管的发射极，与另一个晶体管的下沉区域的尾部相邻。

公开(公告)号：US07105373B1

公开(公告)日：2006-09-12

申请号：US10640963

申请日：2003-08-14

Applicant: Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Andy Strachan

Inventor： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Andy Strachan

IPC: H01L21/00

CPC classification number: H01L31/028 ,  H01L31/103 ,  Y02E10/547

Abstract: A single junction interdigitated photodiode utilizes a stack of alternating highly doped first regions of a first conductivity type and highly doped second regions of a second conductivity type, which are formed below and contact the first regions, to collect photons. In addition, a highly doped sinker of a first conductivity type contacts each first region, and a highly doped sinker of a second conductivity type contacts each second region.

Abstract translation: 单结交叉光电二极管利用第一导电类型的交替的高度掺杂的第一区域和第二导电类型的高度掺杂的第二区域的堆叠，其在下面形成并接触第一区域以收集光子。 此外，第一导电类型的高掺杂沉降片接触每个第一区域，并且第二导电类型的高掺杂沉降片接触每个第二区域。

公开(公告)号：US07050314B1

公开(公告)日：2006-05-23

申请号：US10625961

申请日：2003-07-23

Applicant: Vladislav Vashchenko ,  Peter J. Hopper ,  Yuri Mirgorodski ,  Philipp Lindorfer

Inventor： Vladislav Vashchenko ,  Peter J. Hopper ,  Yuri Mirgorodski ,  Philipp Lindorfer

IPC: H02M3/18

CPC classification number: H02M3/07

Abstract: A charge pump circuit in which at least one of the switching elements takes the form of a LVTSCR. The switching on and off of the LVTSCRs may be achieved by making use of a pulsed input and relying on the triggering and holding voltages of the LVTSCRs to switch on and off.

Abstract translation: 一种电荷泵电路，其中至少一个开关元件采取LVTSCR的形式。 LVTSCR的接通和断开可以通过使用脉冲输入并依靠LVTSCR的触发和保持电压来接通和关断来实现。

公开(公告)号：US20060027845A1

公开(公告)日：2006-02-09

申请号：US11242094

申请日：2005-10-03

Applicant: Peter Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

Inventor： Peter Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

IPC: H01L31/113

CPC classification number: H01L27/11526 ,  H01L27/115 ,  H01L27/11531 ,  H01L27/14603 ,  H01L27/14609

Abstract: The integration period of an imaging cell, or the time that an imaging cell is exposed to light energy, is substantially increased by utilizing a single-poly, electrically-programmable, read-only-memory (EPROM) structure to capture the light energy. Photogenerated electrons are formed in the channel region of the EPROM structure from the light energy. The photogenerated electrons are then accelerated into having ionizing collisions which, in turn, leads to electrons being injected onto the floating gate of the EPROM structure at a rate that is proportionate to the number of photons captured by the channel region.

Abstract translation: 成像单元的积分周期或成像单元暴露于光能的时间通过利用单聚电子可编程只读存储器（EPROM）结构捕获光能而大大增加。 光能从EPROM结构的沟道区形成光电子。 光生成的电子然后被加速成具有电离碰撞，其进而导致电子以与通道区域捕获的光子数成正比的速率注入到EPROM结构的浮动栅极上。