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    Semiconductor memory device and redundancy method of the same
    11.
    发明授权
    Semiconductor memory device and redundancy method of the same 有权
    半导体存储器件和冗余方法相同

    公开(公告)号：US07535780B2

    公开(公告)日：2009-05-19

    申请号：US11723473

    申请日：2007-03-20

    申请人： Yun-Sang Lee

    发明人： Yun-Sang Lee

    IPC分类号： G11C29/00

    CPC分类号： G06F11/1016 ,  G11C29/42 ,  G11C29/44 ,  G11C29/80 ,  G11C2029/0411 ,  G11C2029/1208

    摘要： A semiconductor memory device may include a memory cell array, a redundancy address decoder, a defective address detection unit, and a defective address program unit. The memory cell array includes a plurality of memory cell groups and a predetermined number of redundancy memory cell groups. The redundancy address decoder includes a predetermined number of redundancy decoders for accessing at least one group of the redundancy memory cell groups when a first defective address is identical to an externally applied address. The defective address detection unit performs a write operation and a read operation on the memory cell array during a test operation to detect a defective address, and outputs the detected defective address as the first defective address when the same defective address is detected a predetermined number of times or more. The defective address program unit receives and programs the first defective address output from the defective address detection unit during a program operation.

    摘要翻译： 半导体存储器件可以包括存储单元阵列，冗余地址解码器，缺陷地址检测单元和缺陷地址程序单元。 存储单元阵列包括多个存储单元组和预定数量的冗余存储单元组。 冗余地址解码器包括预定数量的冗余解码器，用于当第一缺陷地址与外部施加的地址相同时，用于访问至少一组冗余存储单元组。 缺陷地址检测单元在测试操作期间对存储单元阵列执行写入操作和读取操作以检测缺陷地址，并且当检测到相同的缺陷地址时，将检测到的缺陷地址作为第一缺陷地址输出到预定数量的 次以上。 缺陷地址程序单元在编程操作期间接收并编程从缺陷地址检测单元输出的第一缺陷地址。

    Methods for supplying power supply voltages in semiconductor memory devices and semiconductor memory devices using the same
    12.
    发明申请
    Methods for supplying power supply voltages in semiconductor memory devices and semiconductor memory devices using the same 有权
    在使用其的半导体存储器件和半导体存储器件中提供电源电压的方法

    公开(公告)号：US20090067217A1

    公开(公告)日：2009-03-12

    申请号：US12071348

    申请日：2008-02-20

    申请人： Jung Sunwoo ,  Yun-Sang Lee

    发明人： Jung Sunwoo ,  Yun-Sang Lee

    IPC分类号： G11C11/24 ,  G11C5/14 ,  G11C8/08

    CPC分类号： G11C5/147 ,  G11C7/1012 ,  G11C7/1051 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1096 ,  G11C11/4074 ,  G11C11/4096

    摘要： In a method for supplying power supply voltages in a semiconductor memory device a first source voltage is applied to a memory cell of a memory cell array as a cell array internal voltage for operating a sense amplifier coupled to the memory cell. A second source voltage is applied as a word line drive voltage of the memory cell array. The second source voltage has a voltage level higher than a voltage level of the first source voltage. The second source voltage is also applied as a drive voltage of an input/output line driver to drive write data into an input/output line in a write operating mode.

    摘要翻译： 在用于在半导体存储器件中提供电源电压的方法中，第一源电压被施加到存储单元阵列的存储单元，作为用于操作耦合到存储单元的读出放大器的单元阵列内部电压。 施加第二源电压作为存储单元阵列的字线驱动电压。 第二源电压具有高于第一源电压的电压电平的电压电平。 第二源电压也作为输入/输出线驱动器的驱动电压施加，以在写操作模式下将写数据驱动到输入/输出线。

    Semiconductor memory device with auto refresh to specified bank
    13.
    发明授权
    Semiconductor memory device with auto refresh to specified bank 有权
    具有自动刷新到指定银行的半导体存储器件

    公开(公告)号：US07145828B2

    公开(公告)日：2006-12-05

    申请号：US11105169

    申请日：2005-04-12

    申请人： Yun-Sang Lee ,  Jung-Bae Lee

    发明人： Yun-Sang Lee ,  Jung-Bae Lee

    IPC分类号： G11C7/00

    CPC分类号： G11C11/40611 ,  G11C11/406 ,  G11C11/40618

    摘要： Method and apparatus for use with multi-bank Synchronous Dynamic Random Access Memory (SDRAM) circuits, modules, and memory systems are disclosed. In one described embodiment, an SDRAM circuit receives a bank address to be used in an auto-refresh operation, and performs the auto-refresh operation on the specified bank and for a current refresh row. When all bank addresses have been supplied for the current row, the SDRAM circuit updates the current refresh row and repeats the process. This process can allow a memory controller to modify an auto-refresh bank sequence as necessary such that auto-refresh operations can proceed on some memory banks concurrently with reads and writes to other memory banks, allowing better utilization of the SDRAM circuit. Other embodiments are described and claimed.

    摘要翻译： 公开了用于多存储体同步动态随机存取存储器（SDRAM）电路，模块和存储器系统的方法和装置。 在一个描述的实施例中，SDRAM电路接收要在自动刷新操作中使用的存储体地址，并对指定的存储体和当前刷新行执行自动刷新操作。 当所有存储体地址已被提供给当前行时，SDRAM电路更新当前刷新行并重复该过程。 该过程可以允许存储器控制器根据需要修改自动刷新存储体序列，使得自动刷新操作可以在一些存储体上与对其它存储体的读取和写入同时进行，从而更好地利用SDRAM电路。 描述和要求保护其他实施例。

    Semiconductor memory device performing auto refresh in the self refresh mode
    14.
    发明申请
    Semiconductor memory device performing auto refresh in the self refresh mode 有权
    在自刷新模式下执行自动刷新的半导体存储器件

    公开(公告)号：US20060018174A1

    公开(公告)日：2006-01-26

    申请号：US11169241

    申请日：2005-06-27

    申请人： Taek-Seon Park ,  Yun-Sang Lee ,  Jung-Bae Lee

    发明人： Taek-Seon Park ,  Yun-Sang Lee ,  Jung-Bae Lee

    IPC分类号： G11C7/00

    CPC分类号： G11C11/406 ,  G11C11/40611 ,  G11C11/40618 ,  G11C2211/4067

    摘要： Method and apparatus for use with multi-bank Synchronous Dynamic Random Access Memory (SDRAM) circuits, modules, and memory systems are disclosed. In one described embodiment, an SDRAM circuit receives a bank address to be used in an auto-refresh operation, and performs the auto-refresh operation on the specified bank and for a current refresh row. The device is allowed to enter a self-refresh mode before auto-refresh operations have been completed for all banks and the current refresh row. The memory device completes refresh operations for the current refresh row before proceeding to perform self-refresh operations for new rows. Other embodiments are described and claimed.

    摘要翻译： 公开了用于多存储体同步动态随机存取存储器（SDRAM）电路，模块和存储器系统的方法和装置。 在一个描述的实施例中，SDRAM电路接收要在自动刷新操作中使用的存储体地址，并对指定的存储体和当前刷新行执行自动刷新操作。 在所有存储区和当前刷新行完成自动刷新操作之前，允许该设备进入自刷新模式。 在继续对新行执行自刷新操作之前，内存设备完成当前刷新行的刷新操作。 描述和要求保护其他实施例。

    Circuits and methods for providing page mode operation in semiconductor memory device having partial activation architecture
    15.
    发明授权
    Circuits and methods for providing page mode operation in semiconductor memory device having partial activation architecture 有权

    公开(公告)号：US06826115B2

    公开(公告)日：2004-11-30

    申请号：US10640146

    申请日：2003-08-13

    申请人： Jung-Bae Lee ,  Yun-Sang Lee

    发明人： Jung-Bae Lee ,  Yun-Sang Lee

    IPC分类号： G11C800

    CPC分类号： G11C7/1021 ,  G11C8/10 ,  G11C8/12

    摘要： A semiconductor memory device having a partial activation framework, which provides an efficient page mode operation while operating in a partial activation mode. Control circuits and methods are provided to enable a page mode operation (for read and write data accesses) in a semiconductor memory device (such as a DRAM, FCRAM) having a partial activation framework, resulting in an improved data access speed when data is written/read from memory locations having the same wordline address. In one aspect, a method for accessing data in a memory device comprises activating a first wordline corresponding to a first address to perform a data access operation, receiving a second address after the first address, if the second address is the same as the first address, generating a page mode enable signal for maintaining an activated state of the first wordline corresponding to the first address while activating a second wordline corresponding to the second address, and deactivating the first and second wordlines in response to disabling of the page mode enable signal.

    Methods for supplying power supply voltages in semiconductor memory devices and semiconductor memory devices using the same
    19.
    发明授权
    Methods for supplying power supply voltages in semiconductor memory devices and semiconductor memory devices using the same 有权
    在使用其的半导体存储器件和半导体存储器件中提供电源电压的方法

    公开(公告)号：US07936615B2

    公开(公告)日：2011-05-03

    申请号：US12071348

    申请日：2008-02-20

    申请人： Jung Sunwoo ,  Yun-Sang Lee

    发明人： Jung Sunwoo ,  Yun-Sang Lee

    IPC分类号： G11C5/14

    CPC分类号： G11C5/147 ,  G11C7/1012 ,  G11C7/1051 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1096 ,  G11C11/4074 ,  G11C11/4096

    摘要： In a method for supplying power supply voltages in a semiconductor memory device a first source voltage is applied to a memory cell of a memory cell array as a cell array internal voltage for operating a sense amplifier coupled to the memory cell. A second source voltage is applied as a word line drive voltage of the memory cell array. The second source voltage has a voltage level higher than a voltage level of the first source voltage. The second source voltage is also applied as a drive voltage of an input/output line driver to drive write data into an input/output line in a write operating mode.

    摘要翻译： 在用于在半导体存储器件中提供电源电压的方法中，第一源电压被施加到存储单元阵列的存储单元，作为用于操作耦合到存储单元的读出放大器的单元阵列内部电压。 施加第二源电压作为存储单元阵列的字线驱动电压。 第二源电压具有高于第一源电压的电压电平的电压电平。 第二源电压也作为输入/输出线驱动器的驱动电压施加，以在写操作模式下将写数据驱动到输入/输出线。

    Diaminedithiol derivatives and radiorhenium or radiotechnetium complex thereof; a liver cancer-treating composition comprising the radiorhenium complex and lipiodol; and a kit for preparation of the liver cancer-treating composition
    20.
    发明授权
    Diaminedithiol derivatives and radiorhenium or radiotechnetium complex thereof; a liver cancer-treating composition comprising the radiorhenium complex and lipiodol; and a kit for preparation of the liver cancer-treating composition 有权
    二硫代二醇衍生物及其镭或镭鎓络合物; 包含镭配合物和碘油的肝癌治疗组合物; 以及用于制备肝癌治疗组合物的试剂盒

    公开(公告)号：US07067508B2

    公开(公告)日：2006-06-27

    申请号：US10469198

    申请日：2002-03-08

    申请人： Jae Min Jeong ,  Young Ju Kim ,  Yun-Sang Lee ,  Dong Soo Lee ,  June-Key Chung ,  Myung Chul Lee

    发明人： Jae Min Jeong ,  Young Ju Kim ,  Yun-Sang Lee ,  Dong Soo Lee ,  June-Key Chung ,  Myung Chul Lee

    IPC分类号： A01N43/00 ,  A61K31/33

    CPC分类号： C07D285/00 ,  C07C323/41 ,  C07F13/005 ,  Y02P20/55

    摘要： The present invention relates to a novel diaminedithiol derivative or a pharmaceutically acceptable salt thereof; radiorhenium or radiotechneticum complex thereof; a composition for treating liver cancer comprising the radiorhenium complex and lipiodol; and, a preparative kit of the composition for treating liver cancer.In the composition according to the invention, the diaminedithiol derivative is a novel compound in which long chain alkyl groups were introduced to diaminedithiol, capable of forming a radiorhenium or radiotechnetium complex thereof with an ease and leading to stronger van der Waals bonds with lipiodol. As a result, the complex becomes more stable in a medium, lipiodol, whereby the composition of the invention exhibits a high accumulation rate in liver cancer tissue when injected via hepatic artery, thereby capable of achieving an efficient treatment of liver cancer.

    摘要翻译： 本发明涉及一种新的二硫二硫醇衍生物或其药学上可接受的盐; 镭或其无机技术复合物; 用于治疗肝癌的组合物，其包含铑络合物和碘油; 和用于治疗肝癌的组合物的制备试剂盒。 在本发明的组合物中，二硫二硫醇衍生物是一种新的化合物，其中长链烷基被引入到二硫代二醇中，能够容易地形成其镭或镭鎓络合物，并导致与碘碘醇更强的范德华力键。 结果，复合物在培养基，碘油中变得更稳定，由此本发明的组合物通过肝动脉注射时在肝癌组织中表现出高的积累速率，从而能够实现肝癌的有效治疗。