DRAM having a stacked capacitor and a method for fabricating the same
    11.
    发明授权
    DRAM having a stacked capacitor and a method for fabricating the same 失效
    具有堆叠电容器的DRAM及其制造方法

    公开(公告)号:US06448597B1

    公开(公告)日:2002-09-10

    申请号:US09382638

    申请日:1999-08-25

    IPC分类号: H01L2976

    摘要: A DRAM includes a MOSFET and a stacked capacitor in each memory cell. The stacked capacitor includes a bottom electrode substantially of a cylindrical shape, a top electrode received in the cylindrical-shape bottom electrode, and a capacitor dielectric film for insulation therebetween. The cylindrical shape of the bottom electrode allows a larger deviation for alignment between the capacitor and the capacitor contact.

    摘要翻译: DRAM在每个存储单元中包括MOSFET和堆叠电容器。 叠层电容器包括基本上为圆筒形状的底部电极,容纳在圆柱形底部电极中的顶部电极和用于绝缘的电容器电介质膜。 底部电极的圆柱形状允许电容器和电容器触点之间的对准偏差较大。

    Semiconductor memory device production method

    公开(公告)号:US06338996B1

    公开(公告)日:2002-01-15

    申请号:US09537415

    申请日:2000-03-29

    申请人: Toshihiro Iizuka

    发明人: Toshihiro Iizuka

    IPC分类号: H01L2131

    摘要: In a semiconductor memory device production method for a semiconductor memory device having a capacitor formed by a high dielectric insulation film and a noble metal upper electrode successively formed on a noble metal lower electrode, the formation of the capacitor is followed by anneal in a gas mixture atmosphere of oxygen concentration of 0 to 5% and nitrogen at temperature of 300 to 400 degrees C. This enables to reduce the leak current at room temperature and suppress leak current increase during a high temperature operation.