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11.发明申请METHOD OF FORMING FINE PATTERNS OF SEMICONDUCTOR DEVICE BY USING DOUBLE PATTERNING PROCESS WHICH USES ACID DIFFUSION 有权通过使用双酸性方法形成半导体器件的精细图案的方法使用酸扩散公开(公告)号：US20090274980A1
公开(公告)日：2009-11-05
申请号：US12267687
申请日：2008-11-10
申请人： Yool Kang , Suk-joo Lee , Jung-hyeon Lee , Shi-yong Yi
发明人： Yool Kang , Suk-joo Lee , Jung-hyeon Lee , Shi-yong Yi
IPC分类号： G03F7/20
CPC分类号： H01L21/027 , G03F7/0035 , G03F7/40 , H01L21/0273 , H01L21/0338 , H01L21/32139
摘要： A method of forming fine patterns of a semiconductor device according to a double patterning process that uses acid diffusion is provided. In this method, a plurality of first mask patterns are formed on a substrate so as to be separated from one another. A capping film including an acid source is formed on sidewalls and an upper surface of each of the plurality of first mask patterns. A second mask layer is formed on the capping films. A plurality of acid diffused regions are formed within the second mask layer by diffusing acid obtained from the acid source from the capping films into the second mask layer. A plurality of second mask patterns are formed of residual parts of the second mask layer which remain in the first spaces after removing the acid diffused regions of the second mask layer.
摘要翻译： 提供了根据使用酸扩散的双重图案化工艺形成半导体器件的精细图案的方法。 在该方法中，在基板上形成多个第一掩模图案以彼此分离。 在多个第一掩模图案的每一个的侧壁和上表面上形成包括酸源的封盖膜。 在封盖膜上形成第二掩模层。 通过将从酸源获得的酸从封盖膜扩散到第二掩模层中，在第二掩模层内形成多个酸扩散区。 多个第二掩模图案由除去第二掩模层的酸扩散区域之后残留在第一间隙中的第二掩模层的残留部分形成。
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12.发明授权Semiconductor memory device having self-aligned contacts and method of fabricating the same 失效具有自对准触点的半导体存储器件及其制造方法公开(公告)号：US06885052B2
公开(公告)日：2005-04-26
申请号：US09790240
申请日：2001-02-21
IPC分类号： H01L27/10 , H01L21/60 , H01L21/8242 , H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L27/10855 , H01L21/76897 , H01L27/10814 , H01L27/10888
摘要： A semiconductor memory device having self-aligned contacts, capable of preventing a short-circuit between contacts for bit lines and contacts for storage electrodes and improving a process margin, and a method of fabricating the same are provided. The semiconductor memory device having self-aligned contacts includes a plurality of gate electrode patterns arranged in parallel on a semiconductor substrate, in which a plurality of first spacers are formed along the sidewalls of the gate electrode patterns, a first interdielectric layer formed on the entire surface of a resultant in which the first spacers are formed, a plurality of bit line patterns arranged in parallel on the first interdielectric layer to be perpendicular to the gate electrode patterns, in which a plurality of second spacers are formed along the sidewalls of the bit line patterns, a plurality of contacts for bit lines self-aligned with the first spacers, a second interdielectric layer formed on the entire surface of a resultant in which the second spacers are formed, and a plurality of contacts for storage electrodes simultaneously self-aligned with the second and first spacers.
摘要翻译： 一种具有自对准触点的半导体存储器件及其制造方法，其特征在于能够防止位线触点和存储电极触点之间的短路，并提高加工余量。 具有自对准触点的半导体存储器件包括平行布置在半导体衬底上的多个栅电极图案，其中多个第一间隔物沿着栅电极图案的侧壁形成，第一绝缘层整体形成 其中形成有第一间隔物的结果的表面，在第一电介质层上平行布置成垂直于栅极电极图案的多个位线图案，其中沿着该位的侧壁形成多个第二间隔物 线图案，用于与第一间隔物自对准的位线的多个触点，形成在其中形成有第二间隔物的结果的整个表面上的第二电介质层和用于存储电极的多个触点同时自对准 与第二和第一间隔物。
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13.发明授权Semiconductor memory device having self-aligned contacts and method of fabricating the same 失效具有自对准触点的半导体存储器件及其制造方法公开(公告)号：US07132708B2
公开(公告)日：2006-11-07
申请号：US11054593
申请日：2005-02-09
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L27/10855 , H01L21/76897 , H01L27/10814 , H01L27/10888
摘要： A semiconductor memory device having self-aligned contacts, capable of preventing a short-circuit between contacts for bit lines and contacts for storage electrodes and improving a process margin, and a method of fabricating the same are provided. The semiconductor memory device having self-aligned contacts includes a plurality of gate electrode patterns arranged in parallel on a semiconductor substrate, in which a plurality of first spacers are formed along the sidewalls of the gate electrode patterns, a first interdielectric layer formed on the entire surface of a resultant in which the first spacers are formed, a plurality of bit line patterns arranged in parallel on the first interdielectric layer to be perpendicular to the gate electrode patterns, in which a plurality of second spacers are formed along the sidewalls of the bit line patterns, a plurality of contacts for bit lines self-aligned with the first spacers, a second interdielectric layer formed on the entire surface of a resultant in which the second spacers are formed, and a plurality of contacts for storage electrodes simultaneously self-aligned with the second and first spacers.
摘要翻译： 一种具有自对准触点的半导体存储器件及其制造方法，其特征在于能够防止位线触点和存储电极触点之间的短路，并提高加工余量。 具有自对准触点的半导体存储器件包括平行布置在半导体衬底上的多个栅电极图案，其中多个第一间隔物沿着栅电极图案的侧壁形成，第一绝缘层整体形成 其中形成有第一间隔物的结果的表面，在第一电介质层上平行布置成垂直于栅极电极图案的多个位线图案，其中沿着该位的侧壁形成多个第二间隔物 线图案，用于与第一间隔物自对准的位线的多个触点，形成在其中形成有第二间隔物的结果的整个表面上的第二电介质层和用于存储电极的多个触点同时自对准 与第二和第一间隔物。
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14.发明授权公开(公告)号：US07473497B2
公开(公告)日：2009-01-06
申请号：US11084327
申请日：2005-03-18
申请人： In-sung Kim , Jung-hyeon Lee , Sung-gon Jung
发明人： In-sung Kim , Jung-hyeon Lee , Sung-gon Jung
IPC分类号： G03F1/00
摘要： A phase shifting mask (PSM) for manufacturing a semiconductor device and a method of fabricating the same includes a transparent substrate, a main pattern formed on the transparent substrate and comprising a first phase shifting layer having a first optical transmittance greater than 0, and at least one assistant pattern formed on the transparent substrate proximal to the main pattern for phase-shifting by the same degree as the main pattern and having a second optical transmittance, which is less than the first optical transmittance.
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15.发明授权公开(公告)号：US06893779B2
公开(公告)日：2005-05-17
申请号：US10008064
申请日：2001-11-05
申请人： In-sung Kim , Jung-hyeon Lee , Sung-gon Jung
发明人： In-sung Kim , Jung-hyeon Lee , Sung-gon Jung
IPC分类号： G03F1/00 , G03F1/29 , G03F1/32 , G03F1/36 , G03F1/54 , G03F1/68 , G03F1/70 , H01L21/027 , G03F9/00
摘要： A phase shifting mask (PSM) for manufacturing a semiconductor device and a method of fabricating the same includes a transparent substrate, a main pattern formed on the transparent substrate and comprising a first phase shifting layer having a first optical transmittance greater than 0, and at least one assistant pattern formed on the transparent substrate proximal to the main pattern for phase-shifting by the same degree as the main pattern and having a second optical transmittance, which is less than the first optical transmittance.
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16.发明授权Method of forming fine patterns of semiconductor device by using double patterning process which uses acid diffusion 有权通过使用酸扩散的双重图案化工艺形成半导体器件精细图案的方法公开(公告)号：US08431331B2
公开(公告)日：2013-04-30
申请号：US12267687
申请日：2008-11-10
申请人： Yool Kang , Suk-joo Lee , Jung-hyeon Lee , Shi-yong Yi
发明人： Yool Kang , Suk-joo Lee , Jung-hyeon Lee , Shi-yong Yi
IPC分类号： G03F7/40
CPC分类号： H01L21/027 , G03F7/0035 , G03F7/40 , H01L21/0273 , H01L21/0338 , H01L21/32139
摘要： A method of forming fine patterns of a semiconductor device according to a double patterning process that uses acid diffusion is provided. In this method, a plurality of first mask patterns are formed on a substrate so as to be separated from one another. A capping film including an acid source is formed on sidewalls and an upper surface of each of the plurality of first mask patterns. A second mask layer is formed on the capping films. A plurality of acid diffused regions are formed within the second mask layer by diffusing acid obtained from the acid source from the capping films into the second mask layer. A plurality of second mask patterns are formed of residual parts of the second mask layer which remain in the first spaces after removing the acid diffused regions of the second mask layer.
摘要翻译： 提供了根据使用酸扩散的双重图案化工艺形成半导体器件的精细图案的方法。 在该方法中，在基板上形成多个第一掩模图案以彼此分离。 在多个第一掩模图案的每一个的侧壁和上表面上形成包括酸源的封盖膜。 在封盖膜上形成第二掩模层。 通过将从酸源获得的酸从封盖膜扩散到第二掩模层中，在第二掩模层内形成多个酸扩散区。 多个第二掩模图案由除去第二掩模层的酸扩散区域之后残留在第一间隙中的第二掩模层的残留部分形成。
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17.发明申请公开(公告)号：US20050167758A1
公开(公告)日：2005-08-04
申请号：US11054593
申请日：2005-02-09
IPC分类号： H01L27/10 , H01L21/60 , H01L21/8242 , H01L27/108 , H01L31/113
CPC分类号： H01L27/10855 , H01L21/76897 , H01L27/10814 , H01L27/10888
摘要： A semiconductor memory device having self-aligned contacts, capable of preventing a short-circuit between contacts for bit lines and contacts for storage electrodes and improving a process margin, and a method of fabricating the same are provided. The semiconductor memory device having self-aligned contacts includes a plurality of gate electrode patterns arranged in parallel on a semiconductor substrate, in which a plurality of first spacers are formed along the sidewalls of the gate electrode patterns, a first interdielectric layer formed on the entire surface of a resultant in which the first spacers are formed, a plurality of bit line patterns arranged in parallel on the first interdielectric layer to be perpendicular to the gate electrode patterns, in which a plurality of second spacers are formed along the sidewalls of the bit line patterns, a plurality of contacts for bit lines self-aligned with the first spacers, a second interdielectric layer formed on the entire surface of a resultant in which the second spacers are formed, and a plurality of contacts for storage electrodes simultaneously self-aligned with the second and first spacers.
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18.发明申请Phase shifting mask for manufacturing semiconductor device and method of fabricating the same 有权用于制造半导体器件的相移掩模及其制造方法公开(公告)号：US20050164100A1
公开(公告)日：2005-07-28
申请号：US11084327
申请日：2005-03-18
申请人： In-sung Kim , Jung-hyeon Lee , Sung-gon Jung
发明人： In-sung Kim , Jung-hyeon Lee , Sung-gon Jung
IPC分类号： G03F1/00 , G03F1/29 , G03F1/32 , G03F1/36 , G03F1/54 , G03F1/68 , G03F1/70 , H01L21/027 , G03F9/00 , G03C5/00
摘要： A phase shifting mask (PSM) for manufacturing a semiconductor device and a method of fabricating the same includes a transparent substrate, a main pattern formed on the transparent substrate and comprising a first phase shifting layer having a first optical transmittance greater than 0, and at least one assistant pattern formed on the transparent substrate proximal to the main pattern for phase-shifting by the same degree as the main pattern and having a second optical transmittance, which is less than the first optical transmittance.
摘要翻译： 用于制造半导体器件的相移掩模（PSM）及其制造方法包括：透明基板，形成在透明基板上的主图案，其包括第一透光率大于0的第一相移层，以及第 至少一个辅助图案形成在靠近主图案的透明基板上，用于与主图案相同程度的相移，并具有小于第一光透射率的第二光透射率。
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