公开(公告)号：US07898848B2

公开(公告)日：2011-03-01

申请号：US11788909

申请日：2007-04-23

申请人： Agostino Pirovano ,  Fabio Pellizzer

发明人： Agostino Pirovano ,  Fabio Pellizzer

IPC分类号： G11C11/00

CPC分类号： H01L29/735 ,  G11C13/0004 ,  G11C13/003 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/0207 ,  H01L27/1022 ,  H01L27/24

摘要： An array is formed by a plurality of cells, wherein each cell is formed by a bipolar junction selection transistor having a first, a second, and a control region. The cell includes a common region, forming the second regions of the selection transistors, and a plurality of shared control regions overlying the common region. Each shared control region forms the control regions of a plurality of adjacent selection transistors and accommodates the first regions of the plurality of adjacent selection transistors as well as contact portions of the shared control region. Blocks of adjacent selection transistors of the plurality of selection transistors share a contact portion and the first regions of a block of adjacent selection transistors are arranged along the shared control region between two contact portions. A plurality of biasing structures are formed between pairs of first regions of adjacent selection transistors, for modifying a charge distribution in the shared control region below the biasing structures.

摘要翻译： 阵列由多个单元形成，其中每个单元由具有第一，第二和控制区域的双极结选择晶体管形成。 单元包括形成选择晶体管的第二区域的公共区域和覆盖在公共区域上的多个共享控制区域。 每个共享控制区域形成多个相邻选择晶体管的控制区域并且容纳多个相邻选择晶体管的第一区域以及共享控制区域的接触部分。 多个选择晶体管的相邻选择晶体管的块共享接触部分，并且沿着两个接触部分之间的共享控制区域布置相邻选择晶体管的块的第一区域。 在相邻选择晶体管的第一区域对之间形成多个偏置结构，用于修改偏置结构下方的共享控制区域中的电荷分布。

公开(公告)号：US07606056B2

公开(公告)日：2009-10-20

申请号：US11317622

申请日：2005-12-22

申请人： Fabio Pellizzer ,  Roberto Bez ,  Maria Santina Marangon ,  Roberta Piva ,  Laura Aina

发明人： Fabio Pellizzer ,  Roberto Bez ,  Maria Santina Marangon ,  Roberta Piva ,  Laura Aina

IPC分类号： G11C5/06

CPC分类号： H01L45/1691 ,  H01L27/2445 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

摘要： A process for manufacturing a phase change memory array includes the steps of: forming a plurality of phase change memory cells in an array region of a semiconductor wafer, the phase change memory cells arranged in rows and columns according to a row direction and to a column direction, respectively; forming a control circuit in a control region of the semiconductor wafer; forming a plurality of first bit line portions for mutually connecting phase change memory cells arranged on a same column; forming first level electrical interconnection structures; and forming second level electrical interconnection structures above the first level electrical interconnection structures. The first level electrical interconnection structures include second bit line portions laying on and in contact with the first bit line portions and projecting from the first bit line portions in the column direction for connecting the first bit line portions to the control circuit.

摘要翻译： 一种相变存储器阵列的制造方法包括以下步骤：在半导体晶片的阵列区域中形成多个相变存储单元，根据行方向排列成行和列的相变存储单元和列 方向; 在所述半导体晶片的控制区域中形成控制电路; 形成多个第一位线部分，用于相互连接布置在同一列上的相变存储器单元; 形成一级电互连结构; 以及在所述第一级电互连结构之上形成第二级电互连结构。 第一级电互连结构包括布置在第一位线部分上并与第一位线部分接触的第二位线部分，并且在列方向上从第一位线部分突出以将第一位线部分连接到控制电路。

公开(公告)号：US07515460B2

公开(公告)日：2009-04-07

申请号：US11606762

申请日：2006-11-30

申请人： George Gordon ,  Stephen Hudgens ,  Fabio Pellizzer ,  Agostino Pirovano

发明人： George Gordon ,  Stephen Hudgens ,  Fabio Pellizzer ,  Agostino Pirovano

IPC分类号： G11C11/00

CPC分类号： G11C13/0064 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/79

摘要： A method for programming a phase change memory cell is discussed. A phase change memory cell includes a memory element of a phase change material having a first state, in which the phase change material is crystalline and has a minimum resistance level, a second state in which the phase change material is amorphous and has a maximum resistance level, and a plurality of intermediate states, in which the phase change material includes both crystalline regions and amorphous regions and has intermediate resistance levels. According to the method, a plurality of programming pulses are provided to the phase change memory cell; programming energies respectively associated to the programming pulses are lower than a threshold energy which is required to bring the phase change material to the second state.

摘要翻译： 讨论了一种编程相变存储单元的方法。 相变存储单元包括具有第一状态的相变材料的存储元件，其中所述相变材料是晶体并且具有最小电阻水平，所述相变材料是非晶态且具有最大电阻的第二状态 电平和多个中间状态，其中相变材料包括结晶区域和非晶区域并具有中等电阻水平。 根据该方法，向相变存储单元提供多个编程脉冲; 分别与编程脉冲相关联的编程能量低于使相变材料进入第二状态所需的阈值能量。

公开(公告)号：US20080259677A1

公开(公告)日：2008-10-23

申请号：US11788909

申请日：2007-04-23

申请人： Agostino Pirovano ,  Fabio Pellizzer

发明人： Agostino Pirovano ,  Fabio Pellizzer

IPC分类号： G11C11/00 ,  H01L21/331

CPC分类号： H01L29/735 ,  G11C13/0004 ,  G11C13/003 ,  G11C2213/76 ,  G11C2213/79 ,  H01L27/0207 ,  H01L27/1022 ,  H01L27/24

摘要： An array is formed by a plurality of cells, wherein each cell is formed by a bipolar junction selection transistor having a first, a second, and a control region. The cell includes a common region, forming the second regions of the selection transistors, and a plurality of shared control regions overlying the common region. Each shared control region forms the control regions of a plurality of adjacent selection transistors and accommodates the first regions of the plurality of adjacent selection transistors as well as contact portions of the shared control region. Blocks of adjacent selection transistors of the plurality of selection transistors share a contact portion and the first regions of a block of adjacent selection transistors are arranged along the shared control region between two contact portions. A plurality of biasing structures are formed between pairs of first regions of adjacent selection transistors, for modifying a charge distribution in the shared control region below the biasing structures.

摘要翻译： 阵列由多个单元形成，其中每个单元由具有第一，第二和控制区域的双极结选择晶体管形成。 单元包括形成选择晶体管的第二区域的公共区域和覆盖在公共区域上的多个共享控制区域。 每个共享控制区域形成多个相邻选择晶体管的控制区域并且容纳多个相邻选择晶体管的第一区域以及共享控制区域的接触部分。 多个选择晶体管的相邻选择晶体管的块共享接触部分，并且沿着两个接触部分之间的共享控制区域布置相邻选择晶体管的块的第一区域。 在相邻选择晶体管的第一区域对之间形成多个偏置结构，用于修改偏置结构下方的共享控制区域中的电荷分布。

公开(公告)号：US20080128675A1

公开(公告)日：2008-06-05

申请号：US11606800

申请日：2006-11-30

申请人： Michele Magistretti ,  Pietro Petruzza ,  Giovanni Mazzone ,  Fabio Pellizzer ,  Silvio Cristofalo

发明人： Michele Magistretti ,  Pietro Petruzza ,  Giovanni Mazzone ,  Fabio Pellizzer ,  Silvio Cristofalo

IPC分类号： H01L45/00

CPC分类号： H01L45/1691 ,  H01L27/2445 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

摘要： A phase change memory includes a cup-shaped heater element formed above a body. A tapered phase change region is formed on the cup-shaped heater element. The cup-shaped heater element is formed by depositing a stop layer of a first dielectric material over the body. A first sacrificial layer is deposited over the stop layer, the first sacrificial layer being of a second dielectric material that can be etched selectively with respect to the first dielectric material. An opening is etched in the first sacrificial layer and the stop layer. A heating layer is formed in the opening. The opening is filled with a filling material to obtain a structure having a cup-shaped heating region formed in the stop layer and excess portions extending over said stop layer. The excess portions by an etch selective with respect to the first dielectric material are removed.

摘要翻译： 相变存储器包括形成在主体上方的杯形加热器元件。 在杯形加热器元件上形成锥形相变区域。 杯状加热器元件通过在主体上沉积第一电介质材料的停止层而形成。 第一牺牲层沉积在停止层上，第一牺牲层是可相对于第一介电材料选择性地蚀刻的第二电介质材料。 在第一牺牲层和停止层中蚀刻开口。 在开口中形成加热层。 开口填充有填充材料，以获得形成在止挡层中的杯形加热区域和在所述停止层上延伸的多余部分的结构。 除去相对于第一介电材料选择性的蚀刻的多余部分。

公开(公告)号：US20070278470A1

公开(公告)日：2007-12-06

申请号：US11697166

申请日：2007-04-05

申请人： Fabio Pellizzer ,  Federica Ottogalli

发明人： Fabio Pellizzer ,  Federica Ottogalli

IPC分类号： H01L45/00

CPC分类号： H01L27/2436 ,  H01L27/2445 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1675

摘要： A phase-change memory cell is formed by a phase-change memory element and by a selection element, which is formed in a semiconductor material body and is connected to the phase-change memory element. The phase-change memory element is made up of a calcogenic material layer and a heater. The selection element is in direct contact with the heater and extends through a dielectric region arranged on top of and contiguous to the semiconductor material body. A dielectric material layer is arranged on the dielectric region and houses a portion of the calcogenic material layer.

摘要翻译： 相变存储单元由相变存储元件和形成在半导体材料体中并连接到相变存储元件的选择元件形成。 相变记忆元件由钙质材料层和加热器构成。 选择元件与加热器直接接触并延伸穿过布置在半导体材料体的顶部并邻近半导体材料体的电介质区域。 电介质材料层布置在电介质区域上并容纳一部分钙化物质层。

公开(公告)号：US07227765B2

公开(公告)日：2007-06-05

申请号：US10970842

申请日：2004-10-20

申请人： Guido De Sandre ,  Roberto Bez ,  Fabio Pellizzer

发明人： Guido De Sandre ,  Roberto Bez ,  Fabio Pellizzer

IPC分类号： G11C15/00

CPC分类号： G11C15/04 ,  G11C13/0004 ,  G11C14/00 ,  G11C14/009 ,  G11C15/046

摘要： A content addressable memory cell for a non-volatile content addressable memory, including a non-volatile storage element for storing a content digit, a selection input for selecting the memory cell, a search input for receiving a search digit, and a comparison circuit arrangement for comparing the search digit to the content digit and for driving a match output of the memory cell so as to signal a match between the content digit and the search digit. The non-volatile storage element include at least one phase-change memory element for storing in a non-volatile way the respective content digit.

摘要翻译： 一种用于非易失性内容可寻址存储器的内容可寻址存储器单元，包括用于存储内容数位的非易失性存储元件，用于选择存储单元的选择输入，用于接收搜索数字的搜索输入以及比较电路装置 用于将搜索数字与内容数字进行比较，并用于驱动存储器单元的匹配输出，以便发出内容数字和搜索数字之间的匹配。 非易失性存储元件包括用于以非易失性方式存储相应内容数字的至少一个相变存储器元件。

公开(公告)号：US20070077699A1

公开(公告)日：2007-04-05

申请号：US11606762

申请日：2006-11-30

申请人： George Gordon ,  Stephen Hudgens ,  Fabio Pellizzer ,  Agostino Pirovano

发明人： George Gordon ,  Stephen Hudgens ,  Fabio Pellizzer ,  Agostino Pirovano

IPC分类号： H01L21/8238

CPC分类号： G11C13/0064 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/79

摘要： A method for programming a phase change memory cell is disclosed. A phase change memory cell includes a memory element of a phase change material having a first state, in which the phase change material is crystalline and has a minimum resistance level, a second state in which the phase change material is amorphous and has a maximum resistance level, and a plurality of intermediate states, in which the phase change material includes both crystalline regions and amorphous regions and has intermediate resistance levels. According to the method, a plurality of programming pulses are provided to the phase change memory cell; programming energies respectively associated to the programming pulses are lower than a threshold energy which is required to bring the phase change material to the second state.

摘要翻译： 公开了一种用于编程相变存储器单元的方法。 相变存储单元包括具有第一状态的相变材料的存储元件，其中所述相变材料是晶体并且具有最小电阻水平，所述相变材料是非晶态且具有最大电阻的第二状态 电平和多个中间状态，其中相变材料包括结晶区域和非晶区域并具有中等电阻水平。 根据该方法，向相变存储单元提供多个编程脉冲; 分别与编程脉冲相关联的编程能量低于使相变材料进入第二状态所需的阈值能量。

公开(公告)号：US20060278921A1

公开(公告)日：2006-12-14

申请号：US11411982

申请日：2006-04-26

申请人： Fabio Pellizzer ,  Agostino Pirovano

发明人： Fabio Pellizzer ,  Agostino Pirovano

IPC分类号： H01L29/76

CPC分类号： H01L29/7827 ,  G11C13/0004 ,  H01L27/2454 ,  H01L29/42392 ,  H01L29/665 ,  H01L29/66666 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

摘要： A vertical MOSFET transistor is formed in a body of semiconductor material having a surface. The transistor includes a buried conductive region of a first conductivity type; a channel region of a second conductivity type, arranged on top of the buried conductive region; a surface conductive region of the first conductivity type, arranged on top of the channel region and the buried conductive region; a gate insulation region, extending at the sides of and contiguous to the channel region; and a gate region extending at the sides of and contiguous to the gate insulation region.

摘要翻译： 在具有表面的半导体材料的主体中形成垂直MOSFET晶体管。 晶体管包括第一导电类型的掩埋导电区域; 布置在所述掩埋导电区域的顶部上的第二导电类型的沟道区域; 第一导电类型的表面导电区域布置在沟道区域和掩埋导电区域的顶部上; 栅极绝缘区域，在沟道区域的两侧延伸; 以及在栅极绝缘区域的侧面延伸并且与栅极绝缘区域邻接的栅极区域。

公开(公告)号：US07135696B2

公开(公告)日：2006-11-14

申请号：US10949090

申请日：2004-09-24

申请人： Ilya V. Karpov ,  Charles C. Kuo ,  Yudong Kim ,  Fabio Pellizzer

发明人： Ilya V. Karpov ,  Charles C. Kuo ,  Yudong Kim ,  Fabio Pellizzer

IPC分类号： H01L21/00

CPC分类号： H01L45/1683 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/141 ,  H01L45/16

摘要： A phase change material may be formed within a trench in a first layer to form a damascene memory element and in an overlying layer to form a threshold device. Below the first layer may be a wall heater. The wall heater that heats the overlying phase change material may be formed in a U-shape in some embodiments of the present invention. The phase change material for the memory element may be elongated in one direction to provide greater alignment tolerances with said heater and said threshold device.