Abstract:
The present disclosure provides systems and techniques in which an ambient may be controlled on the basis of a current status of a micro-processed substrate so as to maintain the status within predefined limits. In illustrative embodiments, the substrate may be stored in an ambient, for which temperature and/or contents of one or more gaseous species may be controlled so as to reduce the change of status. Consequently, in particular, queue times may be significantly prolonged, thereby imparting superior flexibility to scheduling the overall process flow in a complex manufacturing environment.
Abstract:
The present disclosure provides in one aspect a semiconductor device including a substrate structure comprising an active semiconductor material formed over a base substrate and a buried insulating material formed between the active semiconductor material and the base substrate, a ferroelectric gate structure disposed over the active semiconductor material in an active region of the substrate structure, the ferroelectric gate structure comprising a gate electrode and a ferroelectric material layer, and a contact region formed in the base substrate under the ferroelectric gate structure.
Abstract:
The present disclosure provides for semiconductor device structures and methods for forming semiconductor device structures, wherein a field-inducing structure is provided lower than an active portion of a fin along a height dimension of that fin, the height dimension extending in parallel to a normal direction of a semiconductor substrate surface in which the fin is formed. The field-inducing structure hereby implements a permanent field effect below the active portion. The active portion of the fin is to be understood as a portion of the fin covered by a gate dielectric.
Abstract:
The present disclosure provides for semiconductor device structures and methods for forming semiconductor device structures, wherein a field-inducing structure is provided lower than an active portion of a fin along a height dimension of that fin, the height dimension extending in parallel to a normal direction of a semiconductor substrate surface in which the fin is formed. The field-inducing structure hereby implements a permanent field effect below the active portion. The active portion of the fin is to be understood as a portion of the fin covered by a gate dielectric.
Abstract:
Disclosed herein are various embodiments of an improved metal gate structure for semiconductor devices, such as transistors. In one example disclosed herein, a transistor has a gate structure consisting of a gate insulation layer positioned on a semiconducting substrate, a high-k insulation layer positioned on the gate insulation layer, a layer of titanium nitride positioned on the high-k insulation layer, a layer of aluminum positioned on the layer of titanium nitride and a layer of polysilicon positioned on the layer of aluminum.