公开(公告)号：US09401263B2

公开(公告)日：2016-07-26

申请号：US14031563

申请日：2013-09-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xiang Hu ,  Gabriel Padron Wells ,  Jack Chao-Hsu Chang ,  Mingmei Wang ,  Taejoon Han

IPC: H01J37/32 ,  H01L21/3065 ,  H01L21/3213

CPC classification number: H01J37/32146 ,  H01J37/32174 ,  H01J2237/3341 ,  H01J2237/3348 ,  H01L21/3065 ,  H01L21/32137

Abstract: Etching a feature of a structure by an etch system is facilitated by varying supply of radio frequency (RF) power pulses to the etch system. The varying provides at least one RF power pulse, of the supplied RF power pulses, that deviates from one or more other RF power pulses, of the supplied RF power pulses, by at least one characteristic.

Abstract translation: 通过改变对蚀刻系统的射频（RF）功率脉冲的供应，便于蚀刻系统蚀刻结构的特征。 变化通过至少一个特征提供所提供的RF功率脉冲中提供的RF功率脉冲的至少一个RF功率脉冲，其偏离所提供的RF功率脉冲的一个或多个其它RF功率脉冲。

公开(公告)号：US09305785B2

公开(公告)日：2016-04-05

申请号：US14318901

申请日：2014-06-30

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Andy Chih-Hung Wei ,  Guillaume Bouche ,  Gabriel Padron Wells ,  Xiang Hu

IPC: H01L27/088 ,  H01L21/28 ,  H01L29/06 ,  H01L23/535 ,  H01L21/762 ,  H01L29/66 ,  H01L27/12 ,  H01L21/84 ,  H01L29/78

CPC classification number: H01L21/28008 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/845 ,  H01L23/535 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/66795 ,  H01L29/785 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments of the present invention provide an improved structure and method of contact formation. A cap nitride is removed from a gate in a region that is distanced from a fin. This facilitates reduced process steps, allowing the gate and the source/drain regions to be opened in the same process step. Extreme Ultraviolet Lithography (EUVL) may be used to pattern the resist to form the contacts.

Abstract translation: 本发明的实施例提供了改进的接触形成的结构和方法。 在与翅片间隔开的区域中，从栅极去除顶盖氮化物。 这有助于减少处理步骤，允许栅极和源极/漏极区域以相同的工艺步骤打开。 可以使用极紫外光刻（EUVL）来形成抗蚀剂以形成接触。

公开(公告)号：US09252238B1

公开(公告)日：2016-02-02

申请号：US14461887

申请日：2014-08-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Kristina Trevino ,  Yuan-Hung Liu ,  Gabriel Padron Wells ,  Xing Zhang ,  Hoong Shing Wong ,  Chang Ho Maeng ,  Taejoon Han ,  Gowri Kamarthy ,  Isabelle Orain ,  Ganesh Upadhyaya

IPC: H01L21/336 ,  H01L29/66 ,  H01L29/51 ,  H01L29/49 ,  H01L21/3213 ,  H01L29/40

CPC classification number: H01L29/66545 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/32136 ,  H01L29/4966 ,  H01L29/517

Abstract: Semiconductor structures and fabrication methods are provided which includes, for instance, providing a gate structure over a semiconductor substrate, the gate structure including multiple conformal gate layers and a gate material disposed within the multiple conformal gate layers; recessing a portion of the multiple conformal gate layers below an upper surface of the gate structure, where upper surfaces of recessed, multiple conformal gate layers are coplanar; and removing a portion of the gate material to facilitate an upper surface of a remaining portion of the gate material to be coplanar with an upper surface of the recessed, multiple conformal gate layers.

Abstract translation: 提供半导体结构和制造方法，其包括例如在半导体衬底上提供栅极结构，所述栅极结构包括多个共形栅极层和设置在多个共形栅极层内的栅极材料; 将多个共形栅极层的一部分凹陷在栅极结构的上表面之下，其中凹入的多个共形栅极层的上表面是共面的; 以及去除所述栅极材料的一部分以便于所述栅极材料的剩余部分的上表面与所述凹入的多个共形栅极层的上表面共面。