CAVITY-MOUNTED CHIPS WITH MULTIPLE ADHESIVES
    11.
    发明公开

    公开(公告)号:US20240154384A1

    公开(公告)日:2024-05-09

    申请号:US17982606

    申请日:2022-11-08

    CPC classification number: H01S5/0236 H01S5/02251 H01S5/024

    Abstract: Structures for a cavity-mounted chip and methods of fabricating a structure for a cavity-mounted chip. The structure comprises a laser chip including a body attached to a substrate. The laser chip has an output, and the body of the laser chip has a bottom surface spaced from the substrate by a gap. The structure further comprises a first adhesive in the first gap and a second adhesive positioned in the first gap between the first adhesive and the output of the laser chip. The first adhesive has a first thermal conductivity, the second adhesive has a second thermal conductivity, and the first thermal conductivity of the first adhesive is greater than the second thermal conductivity of the second adhesive.

    PIC STRUCTURE WITH WIRE(S) BETWEEN Z-STOP SUPPORTS ON SIDE OF OPTICAL DEVICE ATTACH CAVITY

    公开(公告)号:US20240103237A1

    公开(公告)日:2024-03-28

    申请号:US17933199

    申请日:2022-09-19

    CPC classification number: G02B6/423 G02B6/4206 G02B6/424 G02B6/4274

    Abstract: A photonic integrated circuit (PIC) structure includes a substrate, and a cavity defined in the substrate, the cavity including a shoulder at a side of the cavity. A plurality of z-stop supports for an optical device are also included. Each z-stop support of the plurality of z-stop supports is on a support portion of the shoulder. A wire extends over the side of the cavity and between at least two z-stop supports of the plurality of z-stop supports. An optical device is positioned on the plurality of z-stop supports in the cavity and electrically coupled to the wire. Electrical connections between z-stop supports allows larger sized electrical connections to the optical device to mitigate electromigration issues, and increased options for electrical connections.

    WAFER-LEVEL TESTING OF LASERS ATTACHED TO PHOTONICS CHIPS

    公开(公告)号:US20210356684A1

    公开(公告)日:2021-11-18

    申请号:US15930876

    申请日:2020-05-13

    Inventor: Zhuojie Wu Bo Peng

    Abstract: Structures for a photonics chip, testing methods for a photonics chip, and methods of forming a structure for a photonics chip. A photonics chip includes a first waveguide, a second waveguide, an optical tap coupling the first waveguide to the second waveguide, and a photodetector coupled to the second waveguide. A laser is attached to the photonics chip. The laser is configured to generate laser light directed by the first waveguide to the optical tap.

    DEFECT DETECTION SYSTEM FOR CAVITY IN INTEGRATED CIRCUIT

    公开(公告)号:US20240280632A1

    公开(公告)日:2024-08-22

    申请号:US18172488

    申请日:2023-02-22

    CPC classification number: G01R31/2884 G02B6/12004

    Abstract: A structure provides a defect sensor for a cavity in an integrated circuit (IC). The structure includes a cavity defined in a substrate. A boundary is located where the cavity meets with a cavity-free area of the substrate. A metal line is arranged in a serpentine path in both a vertical and a horizontal direction and crosses the boundary. A controller may be provided that is configured to, in response to a change in an electrical characteristic of a signal through the metal line, generate an indication of the presence of a defect and/or change operation of at least one component of the IC. The structure may find application relative to a photonics integrated circuit (PIC) structure including an optical waveguide with a cavity under the optical waveguide.

    STRUCTURE INCLUDING MOISTURE BARRIER ALONG INPUT/OUTPUT OPENING AND RELATED METHOD

    公开(公告)号:US20240243078A1

    公开(公告)日:2024-07-18

    申请号:US18154143

    申请日:2023-01-13

    Inventor: Zhuojie Wu

    Abstract: A structure includes an integrated circuit chip in a substrate, and an I/O opening extending inwardly from an edge of the integrated circuit chip. A dielectric moisture barrier includes a first portion extending along a side of the I/O opening, a second portion extending along the edge of the integrated circuit chip, and a third portion coupling the first moisture barrier portion to the second moisture barrier portion to complete the moisture barrier between the edge of the integrated circuit chip and the I/O opening. The third portion is distanced from the corner of the integrated circuit chip where the I/O opening meets the edge of the chip to prevent damage to the moisture barrier from fabrication processes, such as chip dicing, chip handling or other processes. Various crack stop configurations are also provided to further protect the moisture barrier from damage.

    MOISTURE DETECTION ALONG INPUT/OUTPUT OPENING IN IC STRUCTURE

    公开(公告)号:US20240167974A1

    公开(公告)日:2024-05-23

    申请号:US18058349

    申请日:2022-11-23

    Inventor: Zhuojie Wu

    CPC classification number: G01N27/223 G02B6/12004 G02B2006/12138

    Abstract: An integrated circuit (IC) structure includes a substrate; and a plurality of moisture sensors along an edge of an optical input/output (I/O) opening in the substrate. The plurality of moisture sensors are positioned between a primary guard ring and a moisture barrier. The moisture sensors may detect moisture in a sequential manner to monitor moisture ingress and predict when remedial action is necessary. The teachings of the disclosure may be applicable to any IC structure including an I/O opening, and in particular, IC structures that have elongated I/O openings such as photonic integrated structures (PICs) with optical I/O openings for photonics components, e.g., an optical fiber or an external laser. The moisture sensors provide an early and definitive alarm for moisture, with no false alarms. The system accurately predicts time to failure and allows adjustment based on real time field data input.

    SCATTERING LIGHT-BASED MONITOR FOR PHOTONIC INTEGRATED CIRCUIT, MONITORING SYSTEM AND MONITORING METHOD

    公开(公告)号:US20240019651A1

    公开(公告)日:2024-01-18

    申请号:US17812023

    申请日:2022-07-12

    Abstract: Disclosed is a photonic integrated circuit (PIC) structure including a scattering light-based monitor with photodetectors (e.g., PIN and/or avalanche photodiodes) placed adjacent to one or both sides of an end portion (i.e., a coupler) of a waveguide core at an optical interface with another optical device. The photodetectors are placed in such a way as to enable sensing of scattering light emitted from the end portion as light signals are received (e.g., either from the optical device for propagation to the main body of the waveguide core or from the main body for transmission to the optical device). Also disclosed are a monitoring system and method including the PIC chip structure with the above-described scattering light-based monitor. The system and method assess the optical interface using electric signals generated by the photodetectors.

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