公开(公告)号：US08294844B2

公开(公告)日：2012-10-23

申请号：US12889840

申请日：2010-09-24

申请人： Li-Yi Chen ,  Cheng-Jung Chen ,  Yu-Ming Lin ,  Hung-Chih Lin ,  Yi-Shun Wang

发明人： Li-Yi Chen ,  Cheng-Jung Chen ,  Yu-Ming Lin ,  Hung-Chih Lin ,  Yi-Shun Wang

IPC分类号： G02F1/1333

CPC分类号： G02F1/133308 ,  G02F2001/133314 ,  G02F2201/46

摘要： A liquid crystal display is provided. The liquid crystal display includes a rear bezel, a signal controlling board module, a light source module, a clipping frame, a display panel and a front frame. The rear bezel has a main portion, a receptacle and a plurality of carrying stages. The carrying stages surround the receptacle. The receptacle protrudes from the main body along a direction while the carrying stages protrude from the main portion toward the reverse of the direction. The main body, the receptacle and the carrying stages are formed in one piece. The signal controlling board module is fixed in the receptacle. The carrying stages carry the light source module. The clipping frame and the rear bezel clip the light source module together. The display panel is disposed on the clipping frame. The front frame and the clipping frame clip the display panel together.

摘要翻译： 提供液晶显示器。 液晶显示器包括后挡板，信号控制板模块，光源模块，裁剪框架，显示面板和前框架。 后挡板具有主要部分，插座和多个承载台。 承载台环绕容器。 容器从主体朝向该方向的相反方向从主体沿着方向从主体突出。 主体，插座和承载台形成一体。 信号控制板模块固定在插座中。 载物台承载光源模块。 裁剪框架和后挡板将光源模块夹在一起。 显示面板设置在裁剪框架上。 前框架和裁剪框将显示面板夹在一起。

公开(公告)号：US08106383B2

公开(公告)日：2012-01-31

申请号：US12617770

申请日：2009-11-13

申请人： Keith A. Jenkins ,  Yu-Ming Lin ,  Alberto Valdes-Garcia

发明人： Keith A. Jenkins ,  Yu-Ming Lin ,  Alberto Valdes-Garcia

IPC分类号： H01L29/16 ,  H01L21/04 ,  H01L51/30

CPC分类号： H01L29/78684

摘要： A graphene field effect transistor includes a gate stack, the gate stack including a seed layer, a gate oxide formed over the seed layer, and a gate metal formed over the gate oxide; an insulating layer; and a graphene sheet displaced between the seed layer and the insulating layer.

摘要翻译： 石墨烯场效应晶体管包括栅极堆叠，栅极堆叠包括种子层，形成在种子层上的栅极氧化物和形成在栅极氧化物上的栅极金属; 绝缘层; 以及在种子层和绝缘层之间移动的石墨烯片。

公开(公告)号：US07875195B2

公开(公告)日：2011-01-25

申请号：US11832309

申请日：2007-08-01

申请人： Oded Rabin ,  Paul R. Herz ,  Mildred S. Dresselhaus ,  Akintunde I. Akinwande ,  Yu-Ming Lin

发明人： Oded Rabin ,  Paul R. Herz ,  Mildred S. Dresselhaus ,  Akintunde I. Akinwande ,  Yu-Ming Lin

IPC分类号： H01B13/00

CPC分类号： C23C14/024 ,  B82Y30/00 ,  C23C14/16 ,  C23C14/5873 ,  C30B7/00 ,  C30B7/005 ,  C30B29/605 ,  H01L35/32 ,  H01L35/34 ,  Y10T156/10 ,  Y10T428/12486 ,  Y10T428/1259 ,  Y10T428/24273 ,  Y10T428/24322 ,  Y10T428/24917

摘要： The presently disclosed invention provides for the fabrication of porous anodic alumina (PAA) films on a wide variety of substrates. The substrate comprises a wafer layer and may further include an adhesion layer deposited on the wafer layer. An anodic alumina template is formed on the substrate. When a rigid substrate such as Si is used, the resulting anodic alumina film is more tractable, easily grown on extensive areas in a uniform manner, and manipulated without danger of cracking. The substrate can be manipulated to obtain free-standing alumina templates of high optical quality and substantially flat surfaces. PAA films can also be grown this way on patterned and non-planar surfaces. Furthermore, under certain conditions, the resulting PAA is missing the barrier layer (partially or completely) and the bottom of the pores can be readily accessed electrically. The resultant film can be used as a template for forming an array of nanowires wherein the nanowires are deposited electrochemically into the pores of the template. By patterning the electrically conducting adhesion layer, pores in different areas of the template can be addressed independently, and can be filled electrochemically by different materials. Single-stage and multi-stage nanowire-based thermoelectric devices, consisting of both n-type and p-type nanowires, can be assembled on a silicon substrate by this method.

摘要翻译： 目前公开的发明提供了在各种基底上制造多孔阳极氧化铝（PAA）膜。 衬底包括晶片层，并且还可以包括沉积在晶片层上的粘附层。 在基板上形成阳极氧化铝模板。 当使用诸如Si的刚性基材时，所得的阳极氧化铝膜更易于处理，容易在均匀的方式在广泛的区域生长，并且操作而没有开裂的危险。 可以操作基底以获得高光学质量和基本平坦表面的独立氧化铝模板。 PAA膜也可以在图案和非平面表面上生长。 此外，在某些条件下，所得PAA缺少阻挡层（部分或完全），并且孔的底部可以容易地电接触。 所得膜可以用作形成纳米线阵列的模板，其中纳米线电化学沉积到模板的孔中。 通过图案化导电粘合层，可以独立地解决模板的不同区域中的孔，并且可以通过不同的材料电化学填充。 通过这种方法，可以在硅衬底上组装由n型和p型纳米线组成的单级和多级纳米线型热电装置。

公开(公告)号：US07713912B2

公开(公告)日：2010-05-11

申请号：US11512220

申请日：2006-08-30

申请人： Chia-Hung Huang ,  Yao-Ling Huang ,  Yao-Hsuan Tseng ,  Yu-Ming Lin ,  Shu-Ling Liu

发明人： Chia-Hung Huang ,  Yao-Ling Huang ,  Yao-Hsuan Tseng ,  Yu-Ming Lin ,  Shu-Ling Liu

IPC分类号： B01J23/00 ,  B01J23/06 ,  C01G23/047 ,  C01G9/02 ,  C01G19/02 ,  C09D1/00

CPC分类号： B01J35/004 ,  B01J35/023 ,  B01J35/026 ,  B01J37/0215 ,  B01J37/04

摘要： The present invention relates to a nano-sized photocatalytic sol and application thereof. The invention utilizes spherical nano-photocatalyst and non-spherical photocatalytic sol for coating a photocatalyst layer on a substrate. Because of the stereo, interlaced and composite structure between spherical photocatalyst and non-spherical photocatalyst, a hard and well adhesion coated layer of photocatalyst with good photocatalytic activity can be obtained without using binder.

摘要翻译： 本发明涉及一种纳米级光催化溶胶及其应用。 本发明利用球形纳米光催化剂和非球形光催化溶胶在基材上涂覆光催化剂层。 由于球形光催化剂和非球形光催化剂之间的立体，交错和复合结构，可以在不使用粘合剂的情况下获得具有良好光催化活性的硬质和良好粘附的光催化剂层。

公开(公告)号：US07482232B2

公开(公告)日：2009-01-27

申请号：US11553331

申请日：2006-10-26

申请人： Joerg Appenzeller ,  Phaedon Avouris ,  Yu-Ming Lin

发明人： Joerg Appenzeller ,  Phaedon Avouris ,  Yu-Ming Lin

IPC分类号： H01L29/76

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01L29/0673 ,  Y10S977/721

摘要： The method includes forming a 1-10000 nm thick SiO2, HfO2, Al2O3 and/or quartz gate dielectric on an Si back gate. An Al or Mo gate electrode is formed on the gate dielectric. An Al2O3 insulating layer is formed over the gate electrode. A C, Si, GaAs, InP, and/or InGaAs nanotube is formed on the insulating layer and gate dielectric. The nanotube has a central region on the insulating layer above the gate electrode and first and second ends on the gate dielectric. A source is formed on the first end and spaced from the central region and gate electrode by a first peripheral region. A drain is formed on the second end and spaced from the central region and gate electrode by a second peripheral region. The first and second peripheral regions are doped with Cl2, Br2, K, Na, or a molecule of polyethylenimine using wet deposition or evaporation.

摘要翻译： 该方法包括在Si背栅上形成1-10000nm厚的SiO 2，HfO 2，Al 2 O 3和/或石英栅极电介质。 在栅极电介质上形成Al或Mo栅电极。 在栅电极上形成Al 2 O 3绝缘层。 在绝缘层和栅极电介质上形成C，Si，GaAs，InP和/或InGaAs纳米管。 纳米管在栅电极上方的绝缘层上的中心区域和栅电介质上的第一和第二端。 源极在第一端部上形成并且通​​过第一周边区域与中心区域和栅电极间隔开。 在第二端形成漏极，并且通过第二周边区域与中心区域和栅电极间隔开。 第一和第二周边区域使用湿沉积或蒸发掺杂有Cl 2，Br 2，K，Na或分子的聚乙烯亚胺。

公开(公告)号：US20060034752A1

公开(公告)日：2006-02-16

申请号：US10969943

申请日：2004-10-22

申请人： Yu-Ming Lin ,  Yao-Hsuan Tseng ,  Chien-Chih Chen

发明人： Yu-Ming Lin ,  Yao-Hsuan Tseng ,  Chien-Chih Chen

IPC分类号： C01G23/047

CPC分类号： C01G23/047 ,  B01J21/063 ,  B01J23/42 ,  B01J35/0013 ,  B01J35/004 ,  C01G23/053 ,  C01G55/00 ,  C01P2002/72 ,  C01P2004/04

摘要： A visible-light-activated photocatalyst powder and method for producing and modifying the same are provided. The visible-light-activated photocatalyst powder is produced by improving the process conditions or by modifying with platinum oxide. Further, the UV light-activated titanium dioxide is modified to be more visible light activated by loading platinum oxide on the surface of titanium dioxide. The methods enhance the conversion of sunlight irradiation to chemical energy. The air-born pollutants can be degraded by the treatment with the photocatalyst under UV or visible light irradiation.

摘要翻译： 提供了可见光活化的光催化剂粉末及其制造和改性方法。 可见光活化的光催化剂粉末是通过改善工艺条件或通过用氧化铂进行改性来生产的。 此外，UV光活化二氧化钛被修饰为通过在二氧化钛的表面上加载氧化铂而活化的更可见的光。 该方法增强了阳光照射对化学能的转化。 在UV或可见光照射下，光催化剂的处理可以降低空气污染物质。

公开(公告)号：US08809153B2

公开(公告)日：2014-08-19

申请号：US13468092

申请日：2012-05-10

申请人： Ali Afzali-Ardakani ,  Phaedon Avouris ,  Damon B. Farmer ,  Yu-Ming Lin ,  Yu Zhu

发明人： Ali Afzali-Ardakani ,  Phaedon Avouris ,  Damon B. Farmer ,  Yu-Ming Lin ,  Yu Zhu

IPC分类号： H01L21/336 ,  H01L29/16

CPC分类号： H01L29/1606 ,  H01L29/42376 ,  H01L29/66431 ,  H01L29/7781 ,  Y10S977/734

摘要： Graphene transistor devices and methods of their fabrication are disclosed. In accordance with one method, a resist is deposited to pattern a gate structure area over a graphene channel on a substrate. In addition, gate dielectric material and gate electrode material are deposited over the graphene channel and the resist. Further, the resist and the electrode and dielectric materials that are disposed above the resist are lifted-off to form a gate structure including a gate electrode and a gate dielectric spacer and to expose portions of the graphene channel that are adjacent to the gate structure. Additionally, source and drain electrodes are formed over the exposed portions of the graphene channel.

摘要翻译： 公开了石墨烯晶体管器件及其制造方法。 根据一种方法，沉积抗蚀剂以在基板上的石墨烯通道上图案化栅极结构区域。 此外，栅介电材料和栅电极材料沉积在石墨烯通道和抗蚀剂上。 此外，设置在抗蚀剂上方的抗蚀剂和电极和电介质材料被剥离以形成包括栅极电极和栅介质间隔物的栅极结构，并露出与栅极结构相邻的部分石墨烯通道。 另外，在石墨烯通道的暴露部分上形成源电极和漏电极。

公开(公告)号：US08803131B2

公开(公告)日：2014-08-12

申请号：US13604254

申请日：2012-09-05

申请人： Yu-Ming Lin ,  Jeng-Bang Yau

发明人： Yu-Ming Lin ,  Jeng-Bang Yau

IPC分类号： H01L29/78

CPC分类号： H01L29/1606 ,  B82Y10/00 ,  H01L27/124 ,  H01L29/0665 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/7781 ,  H01L29/78618 ,  H01L29/78684

摘要： An integrated circuit includes a graphene layer, the graphene layer comprising a region of undoped graphene, the undoped graphene comprising a channel of a transistor, and a region of doped graphene, the doped graphene comprising a contact of the transistor; and a gate of the transistor, the gate comprising a carbon nanotube film. A method of fabricating an integrated circuit comprising graphene and carbon nanotubes, includes forming a graphene layer; doping a portion of the graphene layer, resulting in doped graphene and undoped graphene; forming a carbon nanotube film; and etching the carbon nanotube film to form a gate of a transistor, wherein the transistor further comprises a channel comprising the undoped graphene and a contact comprising the doped graphene. A transistor includes a gate, the gate comprising a carbon nanotube film; a channel, the channel comprising undoped graphene; and a contact, the contact comprising doped graphene.

摘要翻译： 集成电路包括石墨烯层，所述石墨烯层包括未掺杂的石墨烯的区域，所述未掺杂的石墨烯包括晶体管的沟道和掺杂的石墨烯的区域，所述掺杂的石墨烯包括所述晶体管的接触; 和晶体管的栅极，所述栅极包括碳纳米管膜。 一种制造包括石墨烯和碳纳米管的集成电路的方法，包括形成石墨烯层; 掺杂一部分石墨烯层，导致掺杂的石墨烯和未掺杂的石墨烯; 形成碳纳米管膜; 以及蚀刻所述碳纳米管膜以形成晶体管的栅极，其中所述晶体管还包括包含所述未掺杂的石墨烯的沟道和包含所述掺杂石墨烯的接触。 晶体管包括栅极，栅极包括碳纳米管膜; 通道，通道包括未掺杂的石墨烯; 和触点，所述触点包括掺杂的石墨烯。

公开(公告)号：US08753965B2

公开(公告)日：2014-06-17

申请号：US13602117

申请日：2012-09-01

申请人： Phaedon Avouris ,  Damon B. Farmer ,  Yu-Ming Lin ,  Yu Zhu

发明人： Phaedon Avouris ,  Damon B. Farmer ,  Yu-Ming Lin ,  Yu Zhu

IPC分类号： H01L21/3205

CPC分类号： H01L29/1606 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/778 ,  H01L29/78684

摘要： A method of forming a transistor structure is provided. The method includes forming a graphene layer on an insulating layer; forming a stack of a first metal portion and a second metal portion over the graphene layer, wherein sidewalls of the first metal portion are vertically coincident with sidewalls of the second metal portion; and laterally offsetting the sidewalls of the first metal portion relative to the sidewalls of the second metal portion by a lateral distance.

摘要翻译： 提供一种形成晶体管结构的方法。 该方法包括在绝缘层上形成石墨烯层; 在所述石墨烯层上形成第一金属部分和第二金属部分的堆叠，其中所述第一金属部分的侧壁与所述第二金属部分的侧壁垂直重合; 并且相对于第二金属部分的侧壁横向偏移第一金属部分的侧壁横向距离。

公开(公告)号：US20140070107A1

公开(公告)日：2014-03-13

申请号：US13610173

申请日：2012-09-11

申请人： Yu-Ming Lin ,  Jeng-Bang Yau

发明人： Yu-Ming Lin ,  Jeng-Bang Yau

IPC分类号： G01T1/02

CPC分类号： G01T1/026 ,  H01L29/1608 ,  H01L31/119 ,  H01L31/1804 ,  H01L51/0048 ,  H01L51/42

摘要： An apparatus comprises a conducting substrate layer, a dielectric layer formed over the conducting substrate layer, a channel formed over at least a portion of the dielectric layer and first and second source/drain regions formed on respective first and second portions of the channel. The channel comprises a thin-film carbon material. The conducting substrate layer, the dielectric layer, the channel and the first and second source/drain regions are configured such that exposure to radiation causes a change in a threshold voltage of the apparatus.

摘要翻译： 一种装置包括导电衬底层，形成在导电衬底层上的电介质层，形成在电介质层的至少一部分上的沟道以及形成在沟道的相应第一和第二部分上的第一和第二源/漏区。 该通道包括薄膜碳材料。 导电基底层，电介质层，沟道以及第一和第二源极/漏极区域被配置为使得暴露于辐射导致装置的阈值电压的变化。