公开(公告)号：US20140159220A1

公开(公告)日：2014-06-12

申请号：US14180146

申请日：2014-02-13

Applicant: Infineon Technologies AG

Inventor： Stefan Willkofer ,  Uwe Wahl ,  Bernhard Knott ,  Markus Hammer ,  Andreas Strasser

IPC: H01L23/495 ,  H01L23/64

CPC classification number: H01L23/4952 ,  H01F2017/0086 ,  H01L23/48 ,  H01L23/49575 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L28/10 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49107 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2924/19104 ,  H01L2924/19107 ,  Y10T29/4902 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.

Abstract translation: 公开了半导体器件，半导体器件的制造方法和发送信号的方法。 根据本发明的实施例，半导体器件包括第一半导体芯片，其包括第一线圈，第二半导体芯片，包括感应耦合到第一线圈的第二线圈，以及在第一半导体芯片和第二线圈之间的隔离中间层 第二个半导体芯片。

公开(公告)号：US20130328166A1

公开(公告)日：2013-12-12

申请号：US13967053

申请日：2013-08-14

Applicant: Infineon Technologies AG

Inventor： Stefan Willkofer ,  Uwe Wahl ,  Bernhard Knott ,  Markus Hammer ,  Andreas Strasser

IPC: H01L49/02

CPC classification number: H01L23/4952 ,  H01F2017/0086 ,  H01L23/48 ,  H01L23/49575 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L28/10 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49107 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2924/19104 ,  H01L2924/19107 ,  Y10T29/4902 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.

Abstract translation: 公开了半导体器件，半导体器件的制造方法和发送信号的方法。 根据本发明的实施例，半导体器件包括第一半导体芯片，其包括第一线圈，第二半导体芯片，包括感应耦合到第一线圈的第二线圈，以及在第一半导体芯片和第二线圈之间的隔离中间层 第二个半导体芯片。

公开(公告)号：US11664811B2

公开(公告)日：2023-05-30

申请号：US16996109

申请日：2020-08-18

Applicant: Infineon Technologies AG

Inventor： Philipp Stelzer ,  Norbert Druml ,  Christian Steger ,  Andreas Strasser

IPC: G01C3/08 ,  H03L7/099 ,  H03L7/087 ,  G02B26/08 ,  G01S7/4863 ,  G01S7/4865 ,  G01S17/931

CPC classification number: H03L7/0992 ,  G01S7/4863 ,  G01S7/4865 ,  G01S17/931 ,  G02B26/0833 ,  H03L7/087

Abstract: A system for driving a microelectromechanical system (MEMS) oscillating structure includes a phase error detector configured to generate a phase error signal based on measured event times and expected event times of the MEMS oscillating structure oscillating about a rotation axis; a disturbance event detector configured to detect a disturbance event based on the phase error signal and a disturbance threshold value; and a phase frequency detector (PFD) and correction circuit configured to, in response to the detected disturbance event, monitor for a plurality of measured crossing events of the MEMS oscillating structure oscillating about the rotation axis, generate a first compensation signal based on at least a first measured crossing event and a second measured crossing event to correct a frequency of the MEMS oscillating structure, and generate a second compensation signal based on a third measured crossing event to correct a phase of the MEMS oscillating structure.

公开(公告)号：US20170160350A1

公开(公告)日：2017-06-08

申请号：US15433524

申请日：2017-02-15

Applicant: Infineon Technologies AG

Inventor： Juergen Zimmer ,  Klemens Pruegl ,  Olaf Kuehn ,  Andreas Strasser ,  Ralf-Rainer Schledz ,  Norbert Thyssen

IPC: G01R33/00 ,  H01L43/02 ,  H01L43/08 ,  H01L27/22 ,  G01R33/09 ,  H01L43/12

CPC classification number: G01R33/0052 ,  G01R33/09 ,  G01R33/093 ,  G01R33/096 ,  G01R33/098 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: Embodiments relate to xMR sensors having very high shape anisotropy. Embodiments also relate to novel structuring processes of xMR stacks to achieve very high shape anisotropies without chemically affecting the performance relevant magnetic field sensitive layer system while also providing comparatively uniform structure widths over a wafer, down to about 100 nm in embodiments. Embodiments can also provide xMR stacks having side walls of the performance relevant free layer system that are smooth and/or of a defined lateral geometry which is important for achieving a homogeneous magnetic behavior over the wafer.

公开(公告)号：US20160343392A1

公开(公告)日：2016-11-24

申请号：US14717213

申请日：2015-05-20

Applicant: Infineon Technologies AG

Inventor： Wolfgang Raberg ,  Andreas Strasser ,  Hermann Wendt ,  Klemens Pruegl

IPC: G11B5/39

CPC classification number: G11B5/3903 ,  G01R33/09 ,  G11B5/3909 ,  G11B2005/3996

Abstract: A magnetoresistive device that can include a magnetoresistive stack and an etch-stop layer (ESL) disposed on the magnetoresistive stack. A method of manufacturing the magnetoresistive device can include: depositing the magnetoresistive stack, the ESL and a mask layer on a substrate; performing a first etching process to etch a portion of the mask layer to expose a portion of the ESL; and performing a second etching process to etch the exposed portion of the ESL and a portion of the magnetoresistive stack. The method can further include depositing a photoresist layer on the hard mask before the first etching process and removing the photoresist layer from the hard mask following the first etching process. The first and second etching processes can be different. For example, the first etching process can be a reactive etching process and the second etching process can be a non-reactive etching process.

Abstract translation: 可以包括磁阻堆叠和设置在磁阻堆叠上的蚀刻停止层（ESL）的磁阻器件。 制造磁阻器件的方法可以包括：在衬底上沉积磁阻堆叠，ESL和掩模层; 执行第一蚀刻工艺以蚀刻掩模层的一部分以暴露ESL的一部分; 以及执行第二蚀刻工艺以蚀刻ESL的暴露部分和磁阻堆叠的一部分。 该方法还可以包括在第一蚀刻工艺之前在硬掩模上沉积光致抗蚀剂层，并且在第一蚀刻工艺之后从硬掩模中除去光致抗蚀剂层。 第一和第二蚀刻工艺可以不同。 例如，第一蚀刻工艺可以是反应性蚀刻工艺，第二蚀刻工艺可以是非反应性蚀刻工艺。

公开(公告)号：US09269654B2

公开(公告)日：2016-02-23

申请号：US14180146

申请日：2014-02-13

Applicant: Infineon Technologies AG

Inventor： Stefan Willkofer ,  Uwe Wahl ,  Bernhard Knott ,  Markus Hammer ,  Andreas Strasser

IPC: H01F5/00 ,  H01F27/28 ,  H01L23/495 ,  H01L23/48 ,  H01L23/522 ,  H01L25/065 ,  H01L49/02 ,  H01L23/64 ,  H01L23/00 ,  H01F17/00

CPC classification number: H01L23/4952 ,  H01F2017/0086 ,  H01L23/48 ,  H01L23/49575 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L28/10 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/49107 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/19102 ,  H01L2924/19104 ,  H01L2924/19107 ,  Y10T29/4902 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.

公开(公告)号：US20150346037A1

公开(公告)日：2015-12-03

申请号：US14290683

申请日：2014-05-29

Applicant: Infineon Technologies AG

Inventor： Andreas Kiep ,  Stefan Willkofer ,  Andreas Strasser

IPC: G01K7/01 ,  H01L35/34 ,  H01L21/308

CPC classification number: G01K7/01 ,  H01L21/308 ,  H01L35/34

Abstract: An integrated temperature sensor comprising a barrier layer connecting at least two conductive elements, wherein the barrier layer has a positive temperature coefficient.

Abstract translation: 一种集成温度传感器，包括连接至少两个导电元件的阻挡层，其中阻挡层具有正温度系数。