公开(公告)号：US10249515B2

公开(公告)日：2019-04-02

申请号：US15089136

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Jimin Yao ,  Eric Li ,  Shawna Liff

IPC: H01L21/56 ,  H01L23/31 ,  H01L21/60

Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a substrate, an electronic component disposed on the substrate and electrically coupled to the substrate, and an underfill material disposed at least partially between the electronic component and the substrate. A lateral portion of the underfill material can comprises a lateral surface extending away from the substrate and a meniscus surface extending between the lateral surface and the electronic component.

公开(公告)号：US09847304B2

公开(公告)日：2017-12-19

申请号：US14998292

申请日：2015-12-24

Applicant: Intel Corporation

Inventor： Eric Li ,  Joshua Heppner ,  Rajendra Dias ,  Mitul Modi

IPC: H01L23/60 ,  H01L23/31 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L23/60 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/552 ,  H01L24/97 ,  H01L2924/15159 ,  H01L2924/1815

Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a bottom surface and a side surface extending from the bottom surface. The side surface can be oriented at a non-perpendicular angle relative to the bottom surface. In another example, an electronic device package can include a top planar surface having a first area, a bottom planar surface having a second area, and a side surface extending between the top surface and the bottom surface. The second area can be larger than the first area. In yet another example, an electronic device package can include a substrate defining a plane, an electronic component disposed on the substrate, and a layer of material disposed about a lateral side of the electronic component. The layer of material can be oriented at an angle of less than 90 degrees relative to the plane.

公开(公告)号：US20170186708A1

公开(公告)日：2017-06-29

申请号：US14998292

申请日：2015-12-24

Applicant: Intel Corporation

Inventor： Eric Li ,  Joshua Heppner ,  Rajendra Dias ,  Mitul Modi

IPC: H01L23/60 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31

CPC classification number: H01L23/60 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/552 ,  H01L24/97 ,  H01L2924/15159 ,  H01L2924/1815

Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a bottom surface and a side surface extending from the bottom surface. The side surface can be oriented at a non-perpendicular angle relative to the bottom surface. In another example, an electronic device package can include a top planar surface having a first area, a bottom planar surface having a second area, and a side surface extending between the top surface and the bottom surface. The second area can be larger than the first area. In yet another example, an electronic device package can include a substrate defining a plane, an electronic component disposed on the substrate, and a layer of material disposed about a lateral side of the electronic component. The layer of material can be oriented at an angle of less than 90 degrees relative to the plane.

公开(公告)号：US09263329B2

公开(公告)日：2016-02-16

申请号：US14219749

申请日：2014-03-19

Applicant: Intel Corporation

Inventor： Chia-Pin Chiu ,  Kinya Ichikawa ,  Yoshihiro Tomita ,  Robert L. Sankman ,  Eric Li

IPC: H01L21/00 ,  H01L21/4763 ,  H01L21/768 ,  H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L25/50 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/11 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/81801 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2924/01029 ,  H01L2924/06 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/1815 ,  H01L2924/381

Abstract: A method of fabricating an electronic package. The method includes filling a mold with an electric conductor to form a number of electrical interconnects within the mold. The mold includes openings that are filled with several electric conductors to form a number of electrical interconnects. The method of fabricating an electronic package further includes attaching the mold to a substrate such that the electrical interconnects engage electrical contacts on the substrate. The method of fabricating an electronic package may further include forming conductive pads on the electrical insulator that engage the electrical interconnects and attaching a die to the substrate such that the die is electrically connected to at least some of the electrical interconnects.

Abstract translation: 一种制造电子封装的方法。 该方法包括用电导体填充模具以在模具内形成多个电互连。 模具包括填充有多个电导体以形成多个电互连的开口。 制造电子封装的方法还包括将模具附接到基板，使得电互连件接合基板上的电触点。 制造电子封装的方法还可以包括在电绝缘体上形成接合电互连并将管芯连接到衬底上的导电焊盘，使得管芯电连接到至少一些电互连。

公开(公告)号：US08879633B2

公开(公告)日：2014-11-04

申请号：US14086385

申请日：2013-11-21

Applicant: Intel Corporation

Inventor： Eric Li

IPC: H04N7/12 ,  H04N11/02 ,  H04N19/57 ,  H04N19/51 ,  H04N5/14

CPC classification number: H04N19/00684 ,  H04N5/145 ,  H04N19/513 ,  H04N19/57 ,  H04N19/573

Abstract: A method includes examining a statistical distribution of motion vectors employed for motion compensation in a first frame of image data. The examining is to produce a distribution model of the motion vectors in the first frame. The method further includes selecting, based at least in part on the distribution model, a block-matching search pattern for use with respect to a second frame of image data. The second frame follows the first frame in a sequence of frames of image data.

Abstract translation: 一种方法包括检查在第一帧图像数据中用于运动补偿的运动矢量的统计分布。 检查是在第一帧中产生运动矢量的分布模型。 该方法还包括至少部分地基于分布模型来选择用于相对于第二帧图像数据使用的块匹配搜索模式。 第二帧遵循图像数据帧序列中的第一帧。