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    FILTERING TRAINING DATA FOR MODELS IN A DATA CENTER
    11.
    发明申请
    FILTERING TRAINING DATA FOR MODELS IN A DATA CENTER 审中-公开

    公开(公告)号：US20190034829A1

    公开(公告)日：2019-01-31

    申请号：US15857313

    申请日：2017-12-28

    Applicant: Intel Corporation

    Inventor： FRANCESC GUIM BERNAT ,  MARK A. SCHMISSEUR ,  KARTHIK KUMAR ,  THOMAS WILLHALM

    IPC: G06N99/00 ,  G06N5/04 ,  G06F3/06

    Abstract: Technology for a data filter device operable to filter training data is described. The data filter device can receive training data from a data provider. The training data can be provided with corresponding metadata that indicates a model stored in a data store that is associated with the training data. The data filter device can identify a filter that is associated with the model stored in the data store. The data filter device can apply the filter to the training data received from the data provider to obtain filtered training data. The data filter device can provide the filtered training data to the model stored in the data store, wherein the filtered training data is used to train the model.

    TECHNIQUES TO CONTROL REMOTE MEMORY ACCESS IN A COMPUTE ENVIRONMENT
    12.
    发明申请
    TECHNIQUES TO CONTROL REMOTE MEMORY ACCESS IN A COMPUTE ENVIRONMENT 审中-公开

    公开(公告)号：US20180373671A1

    公开(公告)日：2018-12-27

    申请号：US15634128

    申请日：2017-06-27

    Applicant: INTEL CORPORATION

    Inventor： FRANCESC GUIM BERNAT ,  KARTHIK KUMAR ,  NICOLAE POPOVICI ,  THOMAS WILLHALM

    IPC: G06F15/173 ,  G06F12/0831 ,  G06F9/52 ,  G06F12/0813

    Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to receive a transaction request to perform a transaction with the memory, the transaction request including a synchronization indication to indicate utilization of transaction synchronization to perform the transaction. Embodiments may include sending a request to a caching agent to perform the transaction, receiving a response from the caching agent, the response to indicate whether the transaction conflicts or does not conflict with another transaction, and performing the transaction if the response indicates the transaction does not conflict with the other transaction, or delaying the transaction for a period of time if the response indicates the transaction does conflict with the other transaction

    Adaptive Data Migration Across Disaggregated Memory Resources
    17.
    发明申请
    Adaptive Data Migration Across Disaggregated Memory Resources 审中-公开

    公开(公告)号：US20190042138A1

    公开(公告)日：2019-02-07

    申请号：US15921346

    申请日：2018-03-14

    Applicant: INTEL CORPORATION

    Inventor： FRANCESC GUIM BERNAT ,  KARTHIK KUMAR ,  THOMAS WILLHALM ,  MARK A. SCHMISSEUR

    IPC: G06F3/06 ,  G06F11/30

    Abstract: Devices and systems for distributing data across disaggregated memory resources is disclosed and described. An acceleration controller device can include an adaptive data migration engine (ADME) configured to communicatively couple to a fabric interconnect, and is further configured to monitor application data performance metrics at the plurality of disaggregated memory pools for a plurality of applications executing on the plurality of compute resources, select a current application having a current application data performance metric, determine an alternate memory pool from the plurality of disaggregated memory pools estimated to increase application data performance relative to the current application data performance metric, and migrate the data from the current memory pool to the alternate memory pool.

    CHANGING A HASH FUNCTION BASED ON A CONFLICT RATIO ASSOCIATED WITH CACHE SETS
    19.
    发明申请
    CHANGING A HASH FUNCTION BASED ON A CONFLICT RATIO ASSOCIATED WITH CACHE SETS 有权
    根据与缓存集相关的冲突比改变一个冲突函数

    公开(公告)号：US20160321187A1

    公开(公告)日：2016-11-03

    申请号：US14701911

    申请日：2015-05-01

    Applicant: Intel Corporation

    Inventor： FRANCESC GUIM BERNAT ,  ALEJANDRO DURAN GONZALEZ

    IPC: G06F12/10 ,  G06F12/12 ,  G06F12/08

    CPC classification number: G06F12/1018 ,  G06F12/0864 ,  G06F12/12 ,  G06F2212/502 ,  G06F2212/69

    Abstract: Data and a memory address associated with the data may be received. A hash value of the memory address may be calculated by using a first hash function. The data may be stored at a cache set of a plurality of cache sets of a cache memory based on the hash value calculated from the first hash function. A determination may be made as to whether the storing of the data at the cache set of the plurality of cache sets of the cache memory is associated with a conflict ratio of the cache memory exceeding a threshold ratio. In response to the conflict ratio exceeding the threshold ratio, a second hash value of a second memory address associated with a second data may be calculated by using a second hash function that is different than the first hash function.

    Abstract translation: 可以接收与数据相关联的数据和存储器地址。 可以通过使用第一散列函数来计算存储器地址的散列值。 数据可以基于从第一散列函数计算的散列值存储在高速缓冲存储器的多个高速缓存组的高速缓存组中。 可以确定高速缓冲存储器的多个高速缓存组中的高速缓存组中的数据的存储是否与高速缓冲存储器的冲突比超过阈值比率相关联。 响应于冲突比超过阈值比率，可以通过使用与第一散列函数不同的第二散列函数来计算与第二数据相关联的第二存储器地址的第二散列值。

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