公开(公告)号：US20200006256A1

公开(公告)日：2020-01-02

申请号：US16465443

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Kyle Yazzie ,  Mohit Mamodia

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/06

Abstract: An apparatus is provided which comprises: a substrate to couple with one or more integrated circuit die(s), an integrated circuit die coupled to the substrate, a metal component coupled to the substrate, wherein the metal component lacks a sealing coating, and a sacrificial metal conductively coupled with the metal component, wherein the sacrificial metal comprises a more anodic metal than the metal component. Other embodiments are also disclosed and claimed.

公开(公告)号：US10290569B2

公开(公告)日：2019-05-14

申请号：US15721707

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Kyle Yazzie ,  Venkata Suresh R. Guthikonda ,  Patrick Nardi ,  Santosh Sankarasubramanian ,  Kevin Y. Lin ,  Leigh M. Tribolet ,  John L. Harper ,  Pramod Malatkar

IPC: H01L23/49 ,  H01L23/498 ,  H01L23/367 ,  H01L21/50 ,  H05K1/02 ,  H01L23/00 ,  H01L23/52

Abstract: An apparatus, comprising a first platform comprising a first working surface having a first non-planar portion; and a second platform comprising a second working surface having a second non-planar portion, wherein: the second working surface is opposite the first working surface, a distance between the first working surface and the second working surface is adjustable, the first non-planar portion comprises a first curved portion, and the second non-planar portion comprises a second curved portion opposite the first curved portion.

公开(公告)号：US09661745B1

公开(公告)日：2017-05-23

申请号：US14979089

申请日：2015-12-22

Applicant: Intel Corporation

Inventor： Kyle Yazzie ,  Pramod Malatkar

IPC: H04N5/225 ,  H05K1/02 ,  H05K3/00 ,  H04N5/374

CPC classification number: H05K1/0271 ,  H04N5/2252 ,  H04N5/2257 ,  H04N13/204 ,  H04N2213/001 ,  H05K1/0203 ,  H05K3/0058

Abstract: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for vacuum lamination of a depth-sensing camera module PCB to a stiffener using built-in vacuum channels. For instance, there is disclosed in accordance with one embodiment means for assembling an electronics module, in which such means include at least affixing a plurality of top-side components to a top side of a printed circuit board; affixing a plurality of bottom-side components to the bottom side of the printed circuit board; sealing a stiffener plate to the bottom side of the printed circuit board, in which the stiffener plate includes a plurality of cavities to accommodate the plurality of bottom-side components affixed to the bottom side of the printed circuit board, and further in which the plurality of cavities are interconnected via one or more channels; applying a vacuum to the stiffener plate via a vacuum port of the stiffener plate to pull the printed circuit board onto the stiffener plate; and bonding the stiffener plate to the bottom side of the printed circuit board while the printed circuit board is held to the stiffener plate via the vacuum. Other related embodiments are disclosed.

公开(公告)号：US11327050B2

公开(公告)日：2022-05-10

申请号：US15900668

申请日：2018-02-20

Applicant: Intel Corporation

Inventor： Kyle Yazzie ,  Rajesh Kumar Neerukatti ,  Naga Sivakumar Yagnamurthy ,  David C. McCoy ,  Pramod Malatkar ,  Frank P. Prieto

IPC: G01N29/44 ,  G01N29/14

Abstract: Disclosed herein are systems and methods for mechanical failure monitoring, detection, and classification in electronic assemblies. In some embodiments, a mechanical monitoring apparatus may include: a fixture to receive an electronic assembly; an acoustic sensor; and a computing device communicatively coupled to the acoustic sensor, wherein the acoustic sensor is to detect an acoustic emission waveform generated by a mechanical failure of the electronic assembly during testing.

公开(公告)号：US11322456B2

公开(公告)日：2022-05-03

申请号：US16611830

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Feras Eid ,  Venkata Suresh R. Guthikonda ,  Shankar Devasenathipathy ,  Chandra M. Jha ,  Je-Young Chang ,  Kyle Yazzie ,  Prasanna Raghavan ,  Pramod Malatkar

IPC: H05K1/18 ,  H01L23/00 ,  H01L21/50 ,  H01L23/544 ,  H01L25/065 ,  H05K1/02

Abstract: A foundation layer having a stiffener and methods of forming a stiffener are described. One or more dies are formed over the foundation layer. Each die has a front side surface that is electrically coupled to the foundation layer and a back side surface that is opposite from the front side surface. A stiffening layer (or a stiffener) is formed on the back side surface of at least one of the dies. The stiffening layer may be directly coupled to the back side surface of the one or more dies without an adhesive layer. The stiffening layer may include one or more materials, including at least one of a metal, a metal alloy, and a ceramic. The stiffening layer may be formed to reduce warpage based on the foundation layer and the dies. The one or more materials of the stiffening layer can be formed using a cold spray.

公开(公告)号：US10957656B2

公开(公告)日：2021-03-23

申请号：US16641601

申请日：2017-09-27

Applicant: Intel Corporation

Inventor： Kyle Yazzie ,  Naga Sivakumar Yagnamurthy ,  Pramod Malatkar ,  Chia-Pin Chiu ,  Mohit Mamodia ,  Mark J. Gallina ,  Rajesh Kumar Neerukatti ,  Joseph Bautista ,  Michael Gregory Drake

IPC: H01L23/40 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498

Abstract: Disclosed herein are integrated circuit (IC) packages with an electronic component having a patterned protective material on a face, as well as related devices and methods. In some embodiments, a computing device may include: an integrated circuit (IC) package with an electronic component having a protective material on the back face of the electronic component, where the protective material is patterned to include an area on the back face of the electronic component that is not covered by the protective material; a circuit board, where the IC package is electrically coupled to the circuit board; and a heat spreader, where the heat spreader is secured to the circuit board and in thermal contact with the area on the back face of the electronic component that is not covered by the protective material.

公开(公告)号：US20190257793A1

公开(公告)日：2019-08-22

申请号：US15900668

申请日：2018-02-20

Applicant: Intel Corporation

Inventor： Kyle Yazzie ,  Rajesh Kumar Neerukatti ,  Naga Sivakumar Yagnamurthy ,  David C. McCoy ,  Pramod Malatkar ,  Frank P. Prieto

IPC: G01N29/14 ,  G01N29/44

Abstract: Disclosed herein are systems and methods for mechanical failure monitoring, detection, and classification in electronic assemblies. In some embodiments, a mechanical monitoring apparatus may include: a fixture to receive an electronic assembly; an acoustic sensor; and a computing device communicatively coupled to the acoustic sensor, wherein the acoustic sensor is to detect an acoustic emission waveform generated by a mechanical failure of the electronic assembly during testing.

公开(公告)号：US20190189567A1

公开(公告)日：2019-06-20

申请号：US15845990

申请日：2017-12-18

Applicant: Intel Corporation

Inventor： Jimin Yao ,  Kyle Yazzie ,  Shawna M. Liff

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/14 ,  H01L21/48 ,  H05K3/10 ,  B29C70/68

CPC classification number: H01L23/562 ,  B29C70/68 ,  B29K2063/00 ,  B29L2031/3481 ,  H01L21/486 ,  H01L23/145 ,  H01L23/49827 ,  H01L23/49838 ,  H05K3/108

Abstract: An apparatus, comprising an Integrated Circuit (IC) package comprising a dielectric, the IC package has a first surface and an opposing second-surface, wherein the first surface is separated from the second surface by a thickness of the IC package, wherein sidewalls extend along a perimeter and through the thickness between the first surface and the second surface, and a structure comprising a frame that extends at least partially along the perimeter of the IC package, wherein the structure extends at least through the thickness of the IC package and inwardly from the sidewalls of the IC package.

公开(公告)号：US10049987B2

公开(公告)日：2018-08-14

申请号：US15390809

申请日：2016-12-27

Applicant: Intel Corporation

Inventor： Chia-Pin Chiu ,  Kyle Yazzie

IPC: B32B3/00 ,  H01L23/544 ,  H01L23/00

CPC classification number: H01L23/544 ,  H01L24/83 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/83122 ,  H01L2224/83132

Abstract: Particular embodiments described herein provide for a base, a plurality of fiducials on the base, and a fluid in one or more of each of the plurality of fiducials to increase recognition of each of the one or more fiducials that includes the fluid by one or more pattern recognition devices. In an example, the fluid is an epoxy and the fiducials are used to determine a placement of components in a component space.

公开(公告)号：US20170181339A1

公开(公告)日：2017-06-22

申请号：US14974113

申请日：2015-12-18

Applicant: Intel Corporation

Inventor： Kyle Yazzie ,  Pramod Malatkar ,  Xiao Lu ,  Daniel Chavez-Clemente

IPC: H05K13/04 ,  H05K3/30

CPC classification number: H05K13/0404 ,  H05K3/30 ,  H05K13/0408

Abstract: A method of assembly comprising providing an assembly probe, the assembly probe having an end coupling face; providing a droplet of fluid on the end coupling face of the assembly probe; coupling an electronic component to the end coupling face of the assembly probe with the fluid droplet, the electronic component having a peripheral dimension equal to or less than 2 mm in each of length, width and height; placing the electronic component on a substrate with the assembly probe; decoupling the electronic component from the end coupling face of the assembly probe; and assembling the electronic component to the substrate.