公开(公告)号：US20180188453A1

公开(公告)日：2018-07-05

申请号：US15393696

申请日：2016-12-29

Applicant: INTEL CORPORATION

Inventor： Yoel Chetrit ,  Judson D. Ryckman ,  Jeffrey B. Driscoll ,  Harel Frish ,  Ling Liao

IPC: G02B6/122 ,  H01P3/16 ,  H01P11/00 ,  G02B6/136 ,  G02B6/12

CPC classification number: G02B6/1228 ,  G02B6/12002 ,  G02B6/136 ,  G02B2006/12038 ,  H01P3/16 ,  H01P11/006

Abstract: Some embodiments of the present disclosure describe a tapered waveguide and a method of making the tapered waveguide, wherein the tapered waveguide comprises a first and a second waveguide, wherein the first and second waveguides overlap in a waveguide overlap area. The first and second waveguides have a different size in at least one dimension perpendicular to an intended direction of propagation of electromagnetic radiation through the tapered waveguide. Across the waveguide overlap area, one of the waveguides gradually transitions or tapers into the other.

公开(公告)号：US12266608B2

公开(公告)日：2025-04-01

申请号：US17104963

申请日：2020-11-25

Applicant: Intel Corporation

Inventor： Susheel Jadhav ,  Kenneth Brown ,  David Hui ,  Ling Liao ,  Syed S. Islam

IPC: H01L23/538 ,  G02B6/42 ,  H01L25/00 ,  H01L25/18

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to packages that include CPUs and PICs electrically coupled via an interconnect bridge. In embodiments, the PIC are electrically coupled with the EMIB using a fan out RDL to extend reach of the PIC electrical connectors. EICs may be electrically coupled between the PIC and the interconnect bridge. The CPUs may be CPUS, graphical processing units (GPUs), field programmable gate arrays (FPGAs), or other processors. Other embodiments may be described and/or claimed.

公开(公告)号：US12222552B2

公开(公告)日：2025-02-11

申请号：US17133347

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Duanni Huang ,  Saeed Fathololoumi ,  Meer Nazmus Sakib ,  Mohammad Montazeri Najafabadi ,  Chaoxuan Ma ,  David Hui ,  Taehwan Kim ,  Ling Liao ,  Hao Li ,  Ganesh Balamurugan ,  Haisheng Rong ,  Aliasghar Eftekhar

IPC: H04B10/66 ,  G02B6/26 ,  G02B6/27 ,  H04J14/06

Abstract: The present disclosure is directed to photonic wavelength division multiplexing (WDM) receivers with polarization diversity and/or low reflectance. In embodiments, a WDM receiver is provided with a splitter, a plurality of waveguides and a plurality of photodetectors in series. The waveguides having particular equal path lengths relationship from the splitter to respective ones of the photodetectors. In other embodiments, the WDM receiver is provided with a splitter, a looped waveguide, a plurality of photodetectors, and a plurality of variable optical attenuators (VOAs). The VOAs are configured to suppress reflection of signal beams back to the transmitter. In various embodiments, the WDM receiver is a receiver sub-assembly of a silicon photonic transceiver disposed in a silicon package. Other embodiments may be described and/or claimed.

公开(公告)号：US20240345319A1

公开(公告)日：2024-10-17

申请号：US18750754

申请日：2024-06-21

Applicant: Intel Corporation

Inventor： Hari Mahalingam ,  Harel Frish ,  Sean McCargar ,  Joshua Keener ,  Shane Yerkes ,  John Heck ,  Ling Liao

IPC: G02B6/122 ,  G02B6/13 ,  G02B6/26 ,  G02B6/30

CPC classification number: G02B6/1228 ,  G02B6/13 ,  G02B6/26 ,  G02B6/305

Abstract: Embodiments of the present disclosure are directed to low numerical aperture (NA) optical couplers, or spot size converters, that include a lateral taper section and/or a vertical adiabatic taper section. In embodiments, the optical couplers may be positioned on a silicon substrate proximate to V-grooves within the substrate to contain optical fibers to self-align and to couple with the optical couplers. Other embodiments may be described and/or claimed.

公开(公告)号：US12019270B2

公开(公告)日：2024-06-25

申请号：US17004429

申请日：2020-08-27

Applicant: Intel Corporation

Inventor： Hari Mahalingam ,  Harel Frish ,  Sean McCargar ,  Joshua Keener ,  Shane Yerkes ,  John Heck ,  Ling Liao

IPC: G02B6/122 ,  G02B6/13 ,  G02B6/26 ,  G02B6/30

CPC classification number: G02B6/1228 ,  G02B6/13 ,  G02B6/26 ,  G02B6/305

Abstract: Embodiments of the present disclosure are directed to low numerical aperture (NA) optical couplers, or spot size converters, that include a lateral taper section and/or a vertical adiabatic taper section. In embodiments, the optical couplers may be positioned on a silicon substrate proximate to V-grooves within the substrate to contain optical fibers to self-align and to couple with the optical couplers. Other embodiments may be described and/or claimed.

公开(公告)号：US20210288035A1

公开(公告)日：2021-09-16

申请号：US16816669

申请日：2020-03-12

Applicant: Intel Corporation

Inventor： Thomas Liljeberg ,  Andrew C. Alduino ,  Ravindranath Vithal Mahajan ,  Ling Liao ,  Kenneth Brown ,  James Jaussi ,  Bharadwaj Parthasarathy ,  Nitin A. Deshpande

IPC: H01L25/16 ,  H01L23/00 ,  G02B6/42 ,  H01L23/367 ,  H04B10/40

Abstract: Embodiments may relate to a microelectronic package that includes a package substrate with an active bridge positioned therein. An active die may be coupled with the package substrate, and communicatively coupled with the active bridge. A photonic integrated circuit (PIC) may also be coupled with the package substrate and communicatively coupled with the active bridge. Other embodiments may be described or claimed.

公开(公告)号：US10444551B2

公开(公告)日：2019-10-15

申请号：US16231217

申请日：2018-12-21

Applicant: Intel Corporation

Inventor： Jeffrey B. Driscoll ,  Ling Liao ,  David Patel

IPC: G02B6/26 ,  G02F1/025 ,  H01P3/08

Abstract: Embodiments may relate to a transmission line to be coupled with an electromagnetic waveguide. The transmission line may include a signal node with a first contact, a second contact, and a via between first contact and the second contact. The transmission line may further include a ground node with a third contact, a fourth contact, and a via between the third contact and the fourth contact. Other embodiments may be described or claimed.

公开(公告)号：US20190146247A1

公开(公告)日：2019-05-16

申请号：US16231217

申请日：2018-12-21

Applicant: Intel Corporation

Inventor： Jeffrey B. Driscoll ,  Ling Liao ,  David Patel

IPC: G02F1/025 ,  H01P3/08

CPC classification number: G02F1/025 ,  G02F1/0344 ,  H01P3/08

Abstract: Embodiments may relate to a transmission line to be coupled with an electromagnetic waveguide. The transmission line may include a signal node with a first contact, a second contact, and a via between first contact and the second contact. The transmission line may further include a ground node with a third contact, a fourth contact, and a via between the third contact and the fourth contact. Other embodiments may be described or claimed.

公开(公告)号：US09709734B2

公开(公告)日：2017-07-18

申请号：US15085766

申请日：2016-03-30

Applicant: Intel Corporation

Inventor： Mahesh Krishnamurthi ,  Judson Ryckman ,  Haisheng Rong ,  Ling Liao ,  Harel Frish ,  Oshrit Harel ,  Assia Barkai ,  Yun-Chung Na ,  Han-Din Liu

IPC: G02B6/12 ,  G02B6/122 ,  G02B6/42 ,  G02B6/132 ,  G02B6/136

CPC classification number: G02B6/122 ,  G02B6/12002 ,  G02B6/1228 ,  G02B6/132 ,  G02B6/136 ,  G02B6/4214 ,  G02B6/4296 ,  G02B2006/12061 ,  G02B2006/121 ,  G02B2006/12104 ,  G02B2006/12147 ,  G02B2006/12152

Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler. In some embodiments, the device may include an optical waveguide to transmit light input from a light source. The optical waveguide may include a semiconductor layer, having a trench with one facet that comprises an edge formed under an approximately 45 degree angle and another facet formed substantially normal to the semiconductor layer. The edge may interface with another medium to form a mirror to receive inputted light and reflect received light substantially perpendicularly to propagate the received light. Other embodiments may be described and/or claimed.

公开(公告)号：US20250110301A1

公开(公告)日：2025-04-03

申请号：US18477836

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Saeed Fathololoumi ,  Reece Andrew DeFrees ,  Kelly Christopher Magruder ,  Harel Frish ,  John M. Heck ,  Ling Liao ,  David Chak Wang Hui ,  Sushrutha Reddy Gujjula

IPC: G02B6/42 ,  H01L23/00 ,  H01L23/367 ,  H01L25/16 ,  H01L25/18

Abstract: Technologies for thermal plugs in photonic integrated circuit (PIC) dies are disclosed. In an illustrative embodiment, several thermal plugs extend from contact pads in a PIC die, through a dielectric layer, to a waveguide layer. The thermal plugs can carry heat at a higher rate than the surrounding dielectric layer, increasing the heat transfer through the PIC die. The PIC die may be mounted on an electronic integrated circuit (EIC) die in an integrated circuit component. The PIC die can transfer heat from the EIC die, through the PIC die, and to another component such as an integrated heat spreader, lowering the temperature of the EIC die. The thermal plugs can increase the heat transfer through the PIC die.