公开(公告)号：US20240388366A1

公开(公告)日：2024-11-21

申请号：US18787886

申请日：2024-07-29

Applicant: Intel Corporation

Inventor： Meer Nazmus Sakib ,  Peicheng Liao ,  Ranjeet Kumar ,  Duanni Huang ,  Haisheng Rong ,  Harel Frish ,  John Heck ,  Chaoxuan Ma ,  Hao Li ,  Ganesh Balamurugan

IPC: H04B10/61

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to coherent optical receivers, including coherent receivers with integrated all-silicon waveguide photodetectors and tunable local oscillators implemented within CMOS technology. Embodiments are also directed to tunable silicon hybrid lasers with integrated temperature sensors to control wavelength. Embodiments are also directed to post-process phase correction of optical hybrid and nested I/Q modulators. Embodiments are also directed to demultiplexing photodetectors based on multiple microrings. In embodiments, all components may be implements on a silicon substrate. Other embodiments may be described and/or claimed.

公开(公告)号：US11211245B2

公开(公告)日：2021-12-28

申请号：US16890937

申请日：2020-06-02

Applicant: Intel Corporation

Inventor： Khaled Ahmed ,  Anup Pancholi ,  John Heck ,  Thomas Sounart ,  Harel Frish ,  Sansaptak Dasgupta

IPC: H01L21/00 ,  H01L21/02 ,  H01L21/8234 ,  H01L21/8222

Abstract: A device includes a layer including a first III-Nitride (III-N) material, a channel layer including a second III-N material, a release layer including nitrogen and a transition metal, where the release layer is between the first III-N material and the second III-N material. The device further includes a polarization layer including a third III-N material above the release layer, a gate structure above the polarization layer, a source structure and a drain structure on opposite sides of the gate structure where the source structure and the drain structure each include a fourth III-N material. The device further includes a source contact on the source structure and a drain contact on the drain structure.

公开(公告)号：US20190129095A1

公开(公告)日：2019-05-02

申请号：US16216976

申请日：2018-12-11

Applicant: Intel Corporation

Inventor： Kimchau Nhu Nguyen ,  George A. Ghiurcan ,  Yoel Chetrit ,  Jeffrey B. Driscoll ,  Richard Jones ,  Harel Frish ,  Reece A. Defrees ,  Wenhua Lin ,  Jung S. Park

IPC: G02B6/122 ,  G02B6/24 ,  H01S5/026

Abstract: Embodiments may relate to a silicon photonic chip, and particularly a back absorber within the silicon photonic chip. The back absorber may include a substrate material with a slab portion that includes a doped portion of the substrate material. The back absorber may be positioned at the backside of a laser that is configured to project light along a waveguide of the silicon photonic chip. Other embodiments may be described or claimed.

公开(公告)号：US20190044003A1

公开(公告)日：2019-02-07

申请号：US15927391

申请日：2018-03-21

Applicant: Intel Corporation

Inventor： John Heck ,  Harel Frish ,  Paul R. West

IPC: H01L31/0232 ,  H01L31/18 ,  G02B6/42

Abstract: In embodiments, an optoelectronic apparatus may include a substrate with a first side and a second side opposite the first side; a photodetector disposed on the first side of the substrate, the photodetector to convert a light signal into an electrical signal; and a dielectric metasurface lens etched into the second side of the substrate, the dielectric metasurface lens to collect incident light and focus it through the substrate onto the photodetector.

公开(公告)号：US12081276B2

公开(公告)日：2024-09-03

申请号：US17133360

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Meer Nazmus Sakib ,  Peicheng Liao ,  Ranjeet Kumar ,  Duanni Huang ,  Haisheng Rong ,  Harel Frish ,  John Heck ,  Chaoxuan Ma ,  Hao Li ,  Ganesh Balamurugan

IPC: H04B10/61

CPC classification number: H04B10/6165 ,  H04B10/612 ,  H04B10/6164

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to coherent optical receivers, including coherent receivers with integrated all-silicon waveguide photodetectors and tunable local oscillators implemented within CMOS technology. Embodiments are also directed to tunable silicon hybrid lasers with integrated temperature sensors to control wavelength. Embodiments are also directed to post-process phase correction of optical hybrid and nested I/Q modulators. Embodiments are also directed to demultiplexing photodetectors based on multiple microrings. In embodiments, all components may be implements on a silicon substrate. Other embodiments may be described and/or claimed.

公开(公告)号：US20240184048A1

公开(公告)日：2024-06-06

申请号：US18496672

申请日：2023-10-27

Applicant: Intel Corporation

Inventor： Harel Frish ,  Pegah Seddighian ,  Kelly Magruder ,  Olufemi Dosunmu

IPC: G02B6/14 ,  G02B6/122

CPC classification number: G02B6/14 ,  G02B6/1228 ,  G02B2006/12152

Abstract: Embodiments relate to an apparatus that includes: an input stage with an input Si slab height, an input Si waveguide height, and an input height difference between the input Si slab height and the input Si waveguide height; an output stage with an output Si slab height that is different from the input Si slab height, an output Si waveguide height that is different from the input Si waveguide height, and an output height difference between the output Si slab height and the output Si waveguide height that is different from the input height difference; and a transition stage positioned between the input stage and the output stage, wherein the transition stage has a transition Si slab height, a transition Si waveguide height, and a transition height difference between the transition Si slab height and the transition Si waveguide height. Other embodiments may be described and/or claimed.

公开(公告)号：US11906777B2

公开(公告)日：2024-02-20

申请号：US16797657

申请日：2020-02-21

Applicant: Intel Corporation

Inventor： John Heck ,  Lina He ,  Sungbong Park ,  Olufemi Isiade Dosunmu ,  Harel Frish ,  Kelly Christopher Magruder ,  Seth M. Slavin ,  Wei Qian ,  Ansheng Liu ,  Nutan Gautam ,  Mark Isenberger

IPC: G02B6/12 ,  H04J14/02 ,  G02B6/122

CPC classification number: G02B6/12007 ,  G02B6/12004 ,  G02B6/1228 ,  H04J14/02 ,  G02B2006/12061

Abstract: Embodiments may relate to a wavelength-division multiplexing (WDM) transceiver that has a silicon waveguide layer coupled with a silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may include a tapered portion that is coupled with the silicon nitride waveguide layer. In some embodiments, the silicon waveguide layer may be coupled with a first oxide layer with a first z-height, and the silicon nitride waveguide layer may be coupled with a second oxide layer with a second z-height that is greater than the first z-height. Other embodiments may be described or claimed.

公开(公告)号：US20220416097A1

公开(公告)日：2022-12-29

申请号：US17358921

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： David Kohen ,  Kelly Magruder ,  Parastou Fakhimi ,  Zhi Li ,  Cung Tran ,  Wei Qian ,  Mark Isenberger ,  Mengyuan Huang ,  Harel Frish ,  Reece DeFrees ,  Ansheng Liu

IPC: H01L31/0232 ,  G02B6/12 ,  H01L31/105 ,  H01L31/107 ,  H01L31/18

Abstract: A photodetector structure over a partial length of a silicon waveguide structure within a photonic integrated circuit (PIC) chip. The photodetector structure is embedded within a cladding material surrounding the waveguide structure. The photodetector structure includes an absorption region, for example comprising Ge. A sidewall of the cladding material may be lined with a sacrificial spacer. After forming the absorption region, the sacrificial spacer may be removed and passivation material formed over a sidewall of the absorption region. Between the absorption region an impurity-doped portion of the waveguide structure there may be a carrier multiplication region, for example comprising crystalline silicon. If present, edge facets of the carrier multiplication region may be protected by a spacer material during the formation of an impurity-doped charge carrier layer. Occurrence of edge facets may be mitigated by embedding a portion of the photodetector structure with a thickness of the waveguide structure.

公开(公告)号：US20220413213A1

公开(公告)日：2022-12-29

申请号：US17358912

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Harel Frish ,  John Heck ,  Randal Appleton ,  Stefan Meister ,  Haisheng Rong ,  Joshua Keener ,  Michael Favaro ,  Wesley Harrison ,  Hari Mahalingam ,  Sergei Sochava

IPC: G02B6/12 ,  H01S5/026 ,  G02B6/122

Abstract: Silicon photonic integrated circuit (PIC) on a multi-zone semiconductor on insulator (SOI) substrate having at least a first zone and a second zone. Various optical devices of the PIC may be located above certain substrate zones that are most suitable. A first length of a photonic waveguide structure comprises the crystalline silicon and is within the first zone, while a second length of the waveguide structure is within the second zone. Within a first zone, the crystalline silicon layer is spaced apart from an underlying substrate material by a first thickness of dielectric material. Within the second zone, the crystalline silicon layer is spaced apart from the underlying substrate material by a second thickness of the dielectric material.

公开(公告)号：US20220390654A1

公开(公告)日：2022-12-08

申请号：US17561781

申请日：2021-12-24

Applicant: Intel Corporation

Inventor： Israel Petronius ,  Harel Frish ,  Randal S. Appleton ,  Ron Friedman ,  Kenneth C. Johnson

IPC: G02B5/18

Abstract: Technologies for silicon diffraction gratings are disclosed. In some embodiments, grating lines of the diffraction gratings may have several sub-lines that make up each grating line of the diffraction grating. The sub-lines may be sub-wavelength features. In some embodiments, several silicon diffraction gratings may be made from a wafer, such as a wafer with a diameter of 300 millimeters. The wafer may be etched precisely across the entire wafer, leading to a high yield of the diffraction gratings.