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    Transition metal oxide bilayers
    11.
    发明授权
    Transition metal oxide bilayers 有权
    过渡金属氧化物双层

    公开(公告)号：US08987697B2

    公开(公告)日：2015-03-24

    申请号：US14252285

    申请日：2014-04-14

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Hieu Pham ,  Vidyut Gopal ,  Imran Hashim ,  Tim Minvielle ,  Yun Wang ,  Takeshi Yamaguchi ,  Hong Sheng Yang

    IPC: H01L29/02 ,  H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/08 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

    Abstract: Embodiments of the invention include nonvolatile memory elements and memory devices comprising the nonvolatile memory elements. Methods for forming the nonvolatile memory elements are also disclosed. The nonvolatile memory element comprises a first electrode layer, a second electrode layer, and a plurality of layers of an oxide disposed between the first and second electrode layers. One of the oxide layers has linear resistance and substoichiometric composition, and the other oxide layer has bistable resistance and near-stoichiometric composition. Preferably, the sum of the two oxide layer thicknesses is between about 20 Å and about 100 Å, and the oxide layer with bistable resistance has a thickness between about 25% and about 75% of the total thickness. In one embodiment, the oxide layers are formed using reactive sputtering in an atmosphere with controlled flows of argon and oxygen.

    Abstract translation: 本发明的实施例包括非易失性存储器元件和包括非易失性存储元件的存储器件。 还公开了形成非易失性存储元件的方法。 非易失性存储元件包括第一电极层，第二电极层和设置在第一和第二电极层之间的多个氧化物层。 氧化物层中的一个具有线性电阻和亚化学计量组成，另一个氧化物层具有双稳态电阻和近化学计量组成。 优选地，两个氧化物层厚度的总和在约和之间，并且具有双稳态电阻的氧化物层具有在总厚度的约25％至约75％之间的厚度。 在一个实施例中，氧化物层在具有受控的氩气和氧气的气氛中使用反应溅射形成。

    Controlling composition of multiple oxides in resistive switching layers using atomic layer deposition
    14.
    发明授权
    Controlling composition of multiple oxides in resistive switching layers using atomic layer deposition 有权
    使用原子层沉积控制电阻式开关层中的多种氧化物的组成

    公开(公告)号：US08883557B1

    公开(公告)日：2014-11-11

    申请号：US14016775

    申请日：2013-09-03

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Chien-Lan Hsueh ,  Vidyut Gopal ,  Randall J. Higuchi ,  Takeshi Yamaguchi

    IPC: H01L21/00 ,  H01L21/16 ,  H01L29/02 ,  H01L47/00 ,  H01L45/00

    CPC classification number: H01L45/085 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616

    Abstract: A method of fabricating a resistive random access memory (ReRAM) cell may include forming a set of nanolaminate structures over an electrode, such that each structure includes at least one first element oxide layer and at least one second element oxide layer. The overall set is operable as a resistive switching layer in a ReRAM cell. In this set, an average atomic ratio of the first element to the second element is different in at least two nanolaminate structures. This ratio may be less in nanolaminate structures that are closer to electrodes than in the middle nanolaminate structures. Alternatively, this ratio may increase from one end of the set to another. The first element may be less electronegative than the second elements. The first element may be hafnium, while the second element may be one of zirconium, aluminum, titanium, tantalum, or silicon.

    Abstract translation: 制造电阻随机存取存储器（ReRAM）单元的方法可以包括在电极上形成一组纳米级氨基酸结构，使得每个结构包括至少一个第一元件氧化物层和至少一个第二元件氧化物层。 整个集合可用作ReRAM单元中的电阻式开关层。 在该组中，第一元素与第二元素的平均原子比在至少两个纳米层间结构中不同。 在比中间的Nanolaminate结构中更接近于电极的纳米酸盐结构中，该比例可能更小。 或者，该比率可以从集合的一端增加到另一端。 第一元素可能比第二元素具有更少的电负性。 第一元素可以是铪，而第二元素可以是锆，铝，钛，钽或硅中的一种。

    Confined Defect Profiling within Resistive Random Memory Access Cells
    16.
    发明申请
    Confined Defect Profiling within Resistive Random Memory Access Cells 有权
    电阻式随机存储器存取单元中的限制缺陷分析

    公开(公告)号：US20140264231A1

    公开(公告)日：2014-09-18

    申请号：US13891472

    申请日：2013-05-10

    Applicant: INTERMOLECULAR INC. ,  KABUSHIKI KAISHA TOSHIBA ,  SANDISK 3D LLC

    Inventor： Yun Wang ,  Vidyut Gopal ,  Chien-Lan Hsueh

    IPC: H01L45/00

    CPC classification number: H01L45/10 ,  G11C13/0002 ,  G11C13/0007 ,  G11C2213/15 ,  G11C2213/51 ,  G11C2213/56 ,  G11C2213/71 ,  G11C2213/77 ,  H01L45/08 ,  H01L45/1253 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641

    Abstract: Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. A stack including a defect source layer, a defect blocking layer, and a defect acceptor layer disposed between the defect source layer and the defect blocking layer may be subjected to annealing. During the annealing, defects are transferred in a controllable manner from the defect source layer to the defect acceptor layer. At the same time, the defects are not transferred into the defect blocking layer thereby creating a lowest concentration zone within the defect acceptor layer. This zone is responsible for resistive switching. The precise control over the size of the zone and the defect concentration within the zone allows substantially improvement of resistive switching characteristics of the ReRAM cell. In some embodiments, the defect source layer includes aluminum oxynitride, the defect blocking layer includes titanium nitride, and the defect acceptor layer includes aluminum oxide.

    Abstract translation: 提供了电阻随机存取存储器（ReRAM）单元及其制造方法。 可以对包括缺陷源层，缺陷阻挡层和设置在缺陷源层和缺陷阻挡层之间的缺陷受主层的堆叠进行退火。 在退火过程中，缺陷以可控方式从缺陷源层转移到缺陷受体层。 同时，缺陷不会转移到缺陷阻挡层中，从而在缺陷受体层内形成最低浓度区。 该区域负责电阻交换。 精确控制区域的尺寸和区域内的缺陷浓度允许ReRAM单元的电阻开关特性得到显着改善。 在一些实施例中，缺陷源层包括氮氧化铝，缺陷阻挡层包括氮化钛，缺陷受主层包括氧化铝。

    Atomic layer deposition of metal oxides for memory applications
    17.
    发明授权
    Atomic layer deposition of metal oxides for memory applications 有权
    用于记忆应用的金属氧化物的原子层沉积

    公开(公告)号：US09006026B2

    公开(公告)日：2015-04-14

    申请号：US14466695

    申请日：2014-08-22

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Zhendong Hong ,  Vidyut Gopal ,  Imran Hashim ,  Randall J. Higuchi ,  Tim Minvielle ,  Hieu Pham ,  Takeshi Yamaguchi

    IPC: H01L21/00 ,  H01L21/8222 ,  H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/146 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1616

    Abstract: Embodiments of the invention generally relate to nonvolatile memory devices and methods for manufacturing such memory devices. The methods for forming improved memory devices, such as a ReRAM cells, provide optimized, atomic layer deposition (ALD) processes for forming a metal oxide film stack which contains at least one hard metal oxide film (e.g., metal is completely oxidized or substantially oxidized) and at least one soft metal oxide film (e.g., metal is less oxidized than hard metal oxide). The soft metal oxide film is less electrically resistive than the hard metal oxide film since the soft metal oxide film is less oxidized or more metallic than the hard metal oxide film. In one example, the hard metal oxide film is formed by an ALD process utilizing ozone as the oxidizing agent while the soft metal oxide film is formed by another ALD process utilizing water vapor as the oxidizing agent.

    Abstract translation: 本发明的实施例一般涉及用于制造这种存储器件的非易失性存储器件和方法。 用于形成改进的存储器件（例如ReRAM单元）的方法提供优化的原子层沉积（ALD）工艺，用于形成金属氧化物膜堆叠，其包含至少一个硬金属氧化物膜（例如，金属被完全氧化或基本上被氧化 ）和至少一种软金属氧化物膜（例如，金属比硬金属氧化物氧化较少）。 由于软金属氧化物膜比硬金属氧化物膜氧化得更少或更金属，所以软金属氧化物膜的电阻小于硬金属氧化物膜。 在一个实例中，通过利用臭氧作为氧化剂的ALD工艺形成硬质金属氧化物膜，而通过利用水蒸汽作为氧化剂的另一ALD工艺形成软金属氧化物膜。

    Atomic Layer Deposition of Metal Oxide Materials for Memory Applications
    18.
    发明申请
    Atomic Layer Deposition of Metal Oxide Materials for Memory Applications 有权
    用于存储器应用的金属氧化物材料的原子层沉积

    公开(公告)号：US20150056749A1

    公开(公告)日：2015-02-26

    申请号：US14506298

    申请日：2014-10-03

    Applicant: Intermolecular Inc. ,  Kabushiki Kaisha Toshiba ,  SanDisk 3D LLC

    Inventor： Yun Wang ,  Tony P. Chiang ,  Vidyut Gopal ,  Imran Hashim ,  Dipankar Pramanik

    IPC: H01L45/00 ,  H01L21/02

    CPC classification number: H01L45/145 ,  C23C16/40 ,  C23C16/45525 ,  H01L21/02175 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/02194 ,  H01L21/022 ,  H01L21/0228 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616

    Abstract: Embodiments of the invention generally relate to nonvolatile memory devices, such as a ReRAM cells, and methods for manufacturing such memory devices, which includes optimized, atomic layer deposition (ALD) processes for forming metal oxide film stacks. The metal oxide film stacks contain a metal oxide coupling layer disposed on a metal oxide host layer, each layer having different grain structures/sizes. The interface disposed between the metal oxide layers facilitates oxygen vacancy movement. In many examples, the interface is a misaligned grain interface containing numerous grain boundaries extending parallel to the electrode interfaces, in contrast to the grains in the bulk film extending perpendicular to the electrode interfaces. As a result, oxygen vacancies are trapped and released during switching without significant loss of vacancies. Therefore, the metal oxide film stacks have improved switching performance and reliability during memory cell applications compared to traditional hafnium oxide based stacks of previous memory cells.

    Abstract translation: 本发明的实施例一般涉及非易失性存储器件，例如ReRAM单元，以及用于制造这种存储器件的方法，其包括用于形成金属氧化物膜堆叠的优化的原子层沉积（ALD）工艺。 金属氧化物膜堆叠包含设置在金属氧化物主体层上的金属氧化物耦合层，每个层具有不同的晶粒结构/尺寸。 设置在金属氧化物层之间的界面有助于氧空位移动。 在许多示例中，与垂直于电极界面延伸的体膜中的晶粒相反，界面是不对齐的晶粒界面，其包含平行于电极界面延伸的许多晶界。 因此，氧空缺在切换期间被捕获和释放，而空位明显损失。 因此，与以前的存储单元的传统的基于氧化铪的堆叠相比，金属氧化物膜堆叠在存储单元应用中具有改进的开关性能和可靠性。

    Etching resistive switching and electrode layers
    19.
    发明授权
    Etching resistive switching and electrode layers 有权
    蚀刻电阻开关和电极层

    公开(公告)号：US08658511B1

    公开(公告)日：2014-02-25

    申请号：US13722714

    申请日：2012-12-20

    Applicant: Intermolecular Inc.

    Inventor： Frederick Carlos Fulgenico ,  Vidyut Gopal ,  Jinhong Tong

    IPC: H01L21/20

    CPC classification number: H01L21/32136 ,  H01L21/31122 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1616 ,  H01L45/1675

    Abstract: Provided are methods for etching resistive switching and electrode layers in resistive random access memory (ReRAM) cells. Both types of layers are etched in the same operation. This approach simplifies processing in comparison to conventional etching, in which each layer is etched individually. The composition of etchants and process conditions are specifically selected to provide robust and effective etching of both types of layers. The two etching rates may be comparable and may be substantially the same, in some embodiments. Plasma etching involving tri-fluoro-methane and oxygen containing etchants may be used on electrode materials, such as titanium nitride, platinum, and ruthenium, and on resistive switching materials, such as oxides of transition metals. For example, a combination of titanium nitride and hafnium oxide may be etched using such processes. In some embodiments, an etched stack includes a third layer, which may function as a current limiter in ReRAM cells.

    Abstract translation: 提供了用于蚀刻电阻式随机存取存储器（ReRAM）单元中的电阻开关和电极层的方法。 在相同的操作中蚀刻两种类型的层。 与常规蚀刻相比，该方法简化了处理，其中每个层被单独蚀刻。 特别选择蚀刻剂和工艺条件的组成以提供两种类型的层的鲁棒且有效的蚀刻。 在一些实施例中，两个蚀刻速率可以是可比较的并且可以基本上相同。 涉及三氟甲烷和含氧蚀刻剂的等离子体蚀刻可以用于电极材料，例如氮化钛，铂和钌，以及电阻开关材料，例如过渡金属的氧化物。 例如，可以使用这样的方法蚀刻氮化钛和氧化铪的组合。 在一些实施例中，蚀刻堆叠包括可在ReRAM单元中用作限流器的第三层。

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