公开(公告)号：US20210359117A1

公开(公告)日：2021-11-18

申请号：US17315627

申请日：2021-05-10

Applicant: Infineon Technologies AG

Inventor： Frank Dieter Pfirsch ,  Christian Philipp Sandow ,  Dorothea Werber

IPC: H01L29/739 ,  H01L29/78 ,  H01L29/66 ,  H01L29/10

Abstract: A vertical power semiconductor device includes a semiconductor body having opposing first and second main surfaces. At least part of a gate trench structure formed at the first main surface extends along a first lateral direction. Body and source regions directly adjoin the gate trench structure. A drift region is arranged between the body region and second main surface. A body contact structure includes first and second body contact sub-regions spaced at a first lateral distance along the first lateral direction. Each body contact sub-region directly adjoins the gate trench structure and has a larger doping concentration than the body region. In a channel region between the body contact sub-regions, the body contact structure has a second lateral distance to the gate trench structure along a second lateral direction perpendicular to the first lateral direction. The first lateral distance is equal to or less than twice the second lateral distance.

公开(公告)号：US09711626B2

公开(公告)日：2017-07-18

申请号：US14810040

申请日：2015-07-27

Applicant: Infineon Technologies AG

Inventor： Frank Dieter Pfirsch ,  Dorothea Werber

IPC: H01L29/739 ,  H01L27/06 ,  H01L29/66 ,  H01L27/07

CPC classification number: H01L29/7395 ,  H01L27/0664 ,  H01L27/0727 ,  H01L27/0761 ,  H01L29/0619 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7397

Abstract: A reverse-conducting IGBT includes a semiconductor body having a drift region arranged between first and second surfaces. The semiconductor body further includes first collector regions arranged at the second surface and in Ohmic contact with a second electrode, backside emitter regions and in Ohmic contact with the second electrode. In a horizontal direction substantially parallel to the first surface, the first collector regions and backside emitter regions define an rc-IGBT area. The semiconductor body further includes a second collector region of the second conductivity type arranged at the second surface and in Ohmic contact with the second electrode. The second collector region defines in the horizontal direction a pilot-IGBT area. The rc-IGBT area includes first semiconductor regions in Ohmic contact with the first electrode and arranged between the drift region and first electrode. The pilot-IGBT area includes second semiconductor regions of the same conductivity type as the first semiconductor regions.

公开(公告)号：US09337185B2

公开(公告)日：2016-05-10

申请号：US14561357

申请日：2014-12-05

Applicant: Infineon Technologies AG

Inventor： Frank Pfirsch ,  Dorothea Werber ,  Carsten Schaeffer

IPC: H01L21/70 ,  H01L21/8248 ,  H01L27/06 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/47 ,  H01L29/739 ,  H01L29/66 ,  H01L27/07

CPC classification number: H01L27/0635 ,  H01L27/0727 ,  H01L29/0615 ,  H01L29/0804 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/47 ,  H01L29/66348 ,  H01L29/7397

Abstract: A semiconductor device includes a first doping region extending from a main surface of a semiconductor substrate into the semiconductor substrate. Further, the semiconductor device includes a second doping region arranged adjacent to the first doping region. The first doping region includes at least one low doping dose portion extending from the main surface of the semiconductor substrate to the second doping region. A doping dose within the low doping dose portion of the first doping region is less than 3 times a breakdown charge. Additionally, the semiconductor device includes a first electrode structure in contact with the first doping region at the main surface of the semiconductor substrate. The work function of the first electrode structure at the main surface of the semiconductor substrate is larger than 4.9 eV or lower than 4.4 eV.

Abstract translation: 半导体器件包括从半导体衬底的主表面延伸到半导体衬底中的第一掺杂区域。 此外，半导体器件包括邻近第一掺杂区布置的第二掺杂区。 第一掺杂区域包括从半导体衬底的主表面延伸到第二掺杂区域的至少一个低掺杂剂量部分。 第一掺杂区域的低掺杂剂量部分内的掺杂剂量小于击穿电荷的3倍。 另外，半导体器件包括与半导体衬底的主表面处的第一掺杂区域接触的第一电极结构。 第一电极结构在半导体衬底的主表面上的功函数大于4.9eV或低于4.4eV。

公开(公告)号：US20150228723A1

公开(公告)日：2015-08-13

申请号：US14178419

申请日：2014-02-12

Applicant: Infineon Technologies AG

Inventor： Dorothea Werber ,  Volodymyr Komarnitskyy ,  Thomas Gutt

IPC: H01L29/08 ,  H01L29/47 ,  H01L29/40 ,  H01L29/06 ,  H01L29/739 ,  H01L29/10

CPC classification number: H01L29/0804 ,  H01L21/28518 ,  H01L21/743 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/407 ,  H01L29/417 ,  H01L29/41725 ,  H01L29/45 ,  H01L29/47 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/8613

Abstract: A semiconductor device includes a semiconductor body including a drift zone of a first conductivity type, an emitter region of a second, complementary conductivity type configured to inject charge carriers into the drift zone, and an emitter electrode. The emitter electrode includes a metal silicide layer in direct ohmic contact with the emitter region. A net impurity concentration in a portion of the emitter region directly adjoining the metal silicide layer is at most 1×1017 cm−3.

Abstract translation: 半导体器件包括半导体本体，其包括第一导电类型的漂移区，配置成将电荷载流子注入到漂移区中的第二互补导电类型的发射极区和发射极。 发射极电极包括与发射极区域直接欧姆接触的金属硅化物层。 与金属硅化物层直接相邻的发射极部分的净杂质浓度为1×1017cm-3以下。

公开(公告)号：US11575032B2

公开(公告)日：2023-02-07

申请号：US17315627

申请日：2021-05-10

Applicant: Infineon Technologies AG

Inventor： Frank Dieter Pfirsch ,  Christian Philipp Sandow ,  Dorothea Werber

IPC: H01L29/739 ,  H01L29/78 ,  H01L29/10 ,  H01L29/66

Abstract: A vertical power semiconductor device includes a semiconductor body having opposing first and second main surfaces. At least part of a gate trench structure formed at the first main surface extends along a first lateral direction. Body and source regions directly adjoin the gate trench structure. A drift region is arranged between the body region and second main surface. A body contact structure includes first and second body contact sub-regions spaced at a first lateral distance along the first lateral direction. Each body contact sub-region directly adjoins the gate trench structure and has a larger doping concentration than the body region. In a channel region between the body contact sub-regions, the body contact structure has a second lateral distance to the gate trench structure along a second lateral direction perpendicular to the first lateral direction. The first lateral distance is equal to or less than twice the second lateral distance.

公开(公告)号：US09337270B2

公开(公告)日：2016-05-10

申请号：US14133912

申请日：2013-12-19

Applicant: Infineon Technologies AG

Inventor： Frank Dieter Pfirsch ,  Dorothea Werber

IPC: H01L21/70 ,  H01L21/8248 ,  H01L29/10 ,  H01L29/739 ,  H01L29/66 ,  H01L29/861

CPC classification number: H01L29/1095 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/861 ,  H01L29/8611 ,  H01L29/8613

Abstract: A semiconductor device includes at least one field effect transistor structure, which is formed on a semiconductor substrate. The field effect transistor structure includes a drift region, a body region, a source region and a gate. The source region and the drift region include at least mainly a first conductivity type, wherein the body region includes at least mainly a second conductivity type. The body region includes at least one low doping dose portion extending from the drift region to at least one of the source region or an electrical contact interface of the body region at a main surface of the semiconductor substrate, wherein a doping dose within the low doping dose portion of the body region is less than 3 times a breakdown charge.

Abstract translation: 半导体器件包括形成在半导体衬底上的至少一个场效应晶体管结构。 场效应晶体管结构包括漂移区，体区，源极区和栅极。 源极区域和漂移区域至少主要包括第一导电类型，其中主体区域至少主要包括第二导电类型。 体区域包括从半导体衬底的主表面处的漂移区域延伸到源区域或主体区域的电接触界面中的至少一个的至少一个低掺杂剂量部分，其中低掺杂中的掺杂剂量 身体区域的剂量部分小于击穿电荷的3倍。

公开(公告)号：US20150236143A1

公开(公告)日：2015-08-20

申请号：US14185117

申请日：2014-02-20

Applicant: Infineon Technologies AG

Inventor： Frank Pfirsch ,  Dorothea Werber

IPC: H01L29/739 ,  H01L21/266 ,  H01L29/66 ,  H01L29/40 ,  H01L29/06

CPC classification number: H01L29/7397 ,  H01L21/266 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/407 ,  H01L29/66348

Abstract: A semiconductor device includes a drift zone of a first conductivity type in a semiconductor body. Controllable cells are configured to form a conductive channel connected with the drift zone in a first state. First zones of the first conductivity type as well as second zones and a third zone of a complementary second conductivity type are between the drift zone and a rear side electrode, respectively. The first, second and third zones directly adjoin the rear side electrode. The third zone is larger and has a lower mean emitter efficiency than the second zones.

Abstract translation: 半导体器件包括半导体本体中的第一导电类型的漂移区。 可控电池被配置为在第一状态下形成与漂移区连接的导电通道。 第一导电类型的第一区以及第二区和互补第二导电类型的第三区分别位于漂移区和后侧电极之间。 第一，第二和第三区域直接毗邻后侧电极。 第三个区域比第二个区域更大，平均发射器效率更低。

公开(公告)号：US20150179637A1

公开(公告)日：2015-06-25

申请号：US14561357

申请日：2014-12-05

Applicant: Infineon Technologies AG

Inventor： Frank Pfirsch ,  Dorothea Werber ,  Carsten Schaeffer

IPC: H01L27/06 ,  H01L29/47 ,  H01L29/739 ,  H01L29/10 ,  H01L29/423 ,  H01L29/06 ,  H01L29/08

CPC classification number: H01L27/0635 ,  H01L27/0727 ,  H01L29/0615 ,  H01L29/0804 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/47 ,  H01L29/66348 ,  H01L29/7397

Abstract: A semiconductor device includes a first doping region extending from a main surface of a semiconductor substrate into the semiconductor substrate. Further, the semiconductor device includes a second doping region arranged adjacent to the first doping region. The first doping region includes at least one low doping dose portion extending from the main surface of the semiconductor substrate to the second doping region. A doping dose within the low doping dose portion of the first doping region is less than 3 times a breakdown charge. Additionally, the semiconductor device includes a first electrode structure in contact with the first doping region at the main surface of the semiconductor substrate. The work function of the first electrode structure at the main surface of the semiconductor substrate is larger than 4.9 eV or lower than 4.4 eV.

Abstract translation: 半导体器件包括从半导体衬底的主表面延伸到半导体衬底中的第一掺杂区域。 此外，半导体器件包括邻近第一掺杂区布置的第二掺杂区。 第一掺杂区域包括从半导体衬底的主表面延伸到第二掺杂区域的至少一个低掺杂剂量部分。 第一掺杂区域的低掺杂剂量部分内的掺杂剂量小于击穿电荷的3倍。 另外，半导体器件包括与半导体衬底的主表面处的第一掺杂区域接触的第一电极结构。 第一电极结构在半导体衬底的主表面上的功函数大于4.9eV或低于4.4eV。

公开(公告)号：US20150109050A1

公开(公告)日：2015-04-23

申请号：US14551632

申请日：2014-11-24

Applicant: Infineon Technologies AG

Inventor： Frank Pfirsch ,  Dorothea Werber ,  Anton Mauder ,  Carsten Schaeffer

IPC: H03K17/66 ,  H03K3/01 ,  H01L29/739

CPC classification number: H03K17/127 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/404 ,  H01L29/407 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7397 ,  H03K3/01 ,  H03K17/66

Abstract: According to an embodiment of a method, a semiconductor device is operated in a reverse biased unipolar mode before operating the semiconductor device in an off-state in a forward biased mode. The semiconductor device includes at least one floating parasitic region disposed outside a cell region of the device.

Abstract translation: 根据一种方法的实施例，半导体器件在反向偏置单极模式下工作，然后在正向偏置模式中将半导体器件操作为截止状态。 半导体器件包括设置在器件的单元区域外的至少一个浮置寄生区域。

公开(公告)号：US20140015007A1

公开(公告)日：2014-01-16

申请号：US13923436

申请日：2013-06-21

Applicant: Infineon Technologies AG

Inventor： Dorothea Werber ,  Frank Pfirsch ,  Hans-Joachim Schulze ,  Carsten Schaeffer ,  Volodymyr Komarnitskyy ,  Anton Mauder ,  Holger Schulze ,  Gerhard Miller

IPC: H01L29/06

CPC classification number: H01L29/0615 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/423 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/8611

Abstract: A semiconductor device includes a cell region having at least one device cell, wherein the at least one device cell includes a first device region of a first conductivity type. The semiconductor device further includes a drift region of a second conductivity type adjoining the first device region of the at least one device cell, a doped region of the first conductivity type adjoining the drift region, and charge carrier lifetime reduction means configured to reduce a charge carrier lifetime in the doped region of the first conductivity type.

Abstract translation: 半导体器件包括具有至少一个器件单元的单元区域，其中至少一个器件单元包括第一导电类型的第一器件区域。 所述半导体器件还包括邻接所述至少一个器件单元的第一器件区域的第二导电类型的漂移区域，与所述漂移区域相邻的所述第一导电类型的掺杂区域以及被配置为减少电荷的电荷载流子寿命降低装置 在第一导电类型的掺杂区域中的载流子寿命。