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    Local oscillator signal generation using opportunistic synthesizer to clock digital synthesis
    11.
    发明授权
    Local oscillator signal generation using opportunistic synthesizer to clock digital synthesis 有权

    公开(公告)号：US10103761B2

    公开(公告)日：2018-10-16

    申请号：US15275779

    申请日：2016-09-26

    Applicant: Intel Corporation

    Inventor： Igal Kushnir ,  Gil Horovitz ,  Sarit Zur

    IPC: H04B1/38 ,  H04B17/00 ,  H04B17/11 ,  H03L7/08 ,  H03B21/00 ,  H03B21/01 ,  H03L7/099 ,  H04L27/20

    Abstract: Control circuitry for use in generating a local oscillator (LO) signal is provided. Synthesizer control circuitry is configured to control synthesizer circuity to generate an analog oscillator signal having a first frequency at which phase noise is minimized. DS control circuitry is configured to generate a control word or message to cause DS circuitry to generate a digital DS signal having a desired frequency when the DS circuitry is clocked by the oscillator signal having the first frequency. The desired frequency is proportional to the LO signal frequency. The digital DS signal generated by the DS circuitry is used to generate the LO signal. Thus the first frequency used to clock the DS circuitry is selected to optimize the oscillator rather than having some relationship to the LO frequency. In addition, a single synthesizer may be used in order to simultaneously generate many LO signals.

    DIGITAL RADIO HEAD CONTROL
    14.
    发明申请
    DIGITAL RADIO HEAD CONTROL 有权

    公开(公告)号：US20210367629A1

    公开(公告)日：2021-11-25

    申请号：US17393564

    申请日：2021-08-04

    Applicant: Intel Corporation

    Inventor： Ashoke Ravi ,  Benjamin Jann ,  Satwik Patnaik ,  Alexandros Margomenos ,  Igal Kushnir ,  Elan Banin ,  Ofir Degani

    IPC: H04B1/04 ,  H03L7/24 ,  G01R27/06 ,  H01Q3/40

    Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

    DIGITAL RADIO HEAD CONTROL
    15.
    发明申请
    DIGITAL RADIO HEAD CONTROL 有权

    公开(公告)号：US20210067182A1

    公开(公告)日：2021-03-04

    申请号：US16550574

    申请日：2019-08-26

    Applicant: Intel Corporation

    Inventor： Ashoke Ravi ,  Jann Benjamin ,  Satwik Patnaik ,  Elan Banin ,  Igal Kushnir ,  Ofir Degani ,  Alexandros Margomenos

    IPC: H04B1/04 ,  H01Q3/40 ,  G01R27/06 ,  H03L7/24

    Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

    Frequency synthesis with reference signal generated by opportunistic phase locked loop
    16.
    发明授权
    Frequency synthesis with reference signal generated by opportunistic phase locked loop 有权

    公开(公告)号：US10804911B2

    公开(公告)日：2020-10-13

    申请号：US16292717

    申请日：2019-03-05

    Applicant: Intel Corporation

    Inventor： Gil Horovitz ,  Sharon Malevsky ,  Evgeny Shumaker ,  Igal Kushnir

    IPC: H03L7/099 ,  H04B1/00

    Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

    Apparatuses for generating an oscillation signal
    17.
    发明授权
    Apparatuses for generating an oscillation signal 有权

    公开(公告)号：US11283456B2

    公开(公告)日：2022-03-22

    申请号：US17059480

    申请日：2019-08-05

    Applicant: Intel Corporation

    Inventor： Ofir Degani ,  Igal Kushnir ,  Elan Banin ,  Rotem Banin

    IPC: H03L7/099 ,  H03B5/32 ,  H03L7/081 ,  H03L7/091 ,  H04B1/04

    Abstract: An apparatus for generating an oscillation signal is provided. The apparatus includes a first oscillator configured to generate a first reference oscillation signal, and a second oscillator configured to generate a second reference oscillation signal. A frequency accuracy of the first oscillator is higher than a frequency accuracy of the second oscillator. Further, an oscillator phase noise of the second oscillator is lower than an oscillator phase noise of the first oscillator. The apparatus further includes a processing circuit configured to generate a third reference oscillation signal based on the first reference oscillation signal and the second reference oscillation signal. Additionally, the apparatus includes a phase-locked loop configured to generate the oscillation signal based on the third reference oscillation signal. A frequency of the oscillation signal is a multiple of a frequency of the third reference oscillation signal.

    Frequency synthesis with reference signal generated by opportunistic phase locked loop
    18.
    发明授权
    Frequency synthesis with reference signal generated by opportunistic phase locked loop 有权

    公开(公告)号：US11264997B2

    公开(公告)日：2022-03-01

    申请号：US17066490

    申请日：2020-10-09

    Applicant: Intel Corporation

    Inventor： Gil Horovitz ,  Sharon Malevsky ,  Evgeny Shumaker ,  Igal Kushnir

    IPC: H03L7/099 ,  H04B1/00

    Abstract: Systems, methods, and circuitries are provided to generate a radio frequency (RF) signal having a desired radio frequency fRF. In one example a frequency synthesizer system includes a clock, an opportunistic phase locked loop (PLL), and an RF PLL. The clock circuitry is configured to generate a clock signal having a frequency fXTL. The opportunistic phase locked loop (PLL) is configured to generate a reference signal having a reference frequency fREF that is close to a free-running frequency of an oscillator in the opportunistic PLL. The opportunistic PLL is configured to synchronize the reference signal to the clock signal. The RF PLL is configured to generate the RF signal having the desired radio frequency and to synchronize the RF signal with the reference signal.

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