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公开(公告)号：US20180253355A1
公开(公告)日：2018-09-06
申请号：US15909929
申请日：2018-03-01
Applicant: Intel Corporation
Inventor： Kiran PANGAL , Prashant S. DAMLE , Rajesh SUNDARAM , Shekoufeh QAWAMI , Julie M. WALKER , Doyle RIVERS
CPC classification number: G06F11/1076 , G06F3/0619 , G06F3/064 , G06F3/0679 , G06F11/1044 , G06F11/1048 , G06F11/1068 , H03M13/05 , H03M13/1515 , H03M13/152 , H03M13/19 , H03M13/27 , H03M13/6508
Abstract: Uncorrectable memory errors may be reduced by determining a logical array address for a set of memory arrays and transforming the logical array address to at least two unique array addresses based, at least in part, on logical locations of at least two memory arrays within the set of memory arrays. The at least two memory arrays are then accessed using the at least two unique array addresses, respectively.
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公开(公告)号：US20180182456A1
公开(公告)日：2018-06-28
申请号：US15894822
申请日：2018-02-12
Applicant: Intel Corporation
Inventor： Sanjay RANGAN , Kiran PANGAL , Nevil N. GAJERA , Lu LIU , Gayathri RAO SUBBU
CPC classification number: G11C13/0069 , G11C7/04 , G11C11/16 , G11C13/0004 , G11C13/0061 , G11C2013/0078 , G11C2013/008 , G11C2013/0092 , H01L45/06 , H01L45/1286 , H01L45/141
Abstract: Phase change material can be set with a multistage set process. Set control logic can heat a phase change semiconductor material (PM) to a first temperature for a first period of time. The first temperature is configured to promote nucleation of a crystalline state of the PM. The control logic can increase the temperature to a second temperature for a second period of time. The second temperature is configured to promote crystal growth within the PM. The nucleation and growth of the crystal set the PM to the crystalline state. The multistage ramping up of the temperature can improve the efficiency of the set process relative to traditional approaches.
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