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    Systems and methods for wireless device testing
    12.
    发明授权
    Systems and methods for wireless device testing 有权

    公开(公告)号：US10247773B2

    公开(公告)日：2019-04-02

    申请号：US15200997

    申请日：2016-07-01

    Applicant: Intel Corporation

    Inventor： Sankaran M. Menon ,  Rehan M. Sheikh ,  Rolf H. Kuehnis ,  John Michael Peterson ,  Asifur Rahman ,  Abram M. Detofsky ,  Mohsen Fazlian

    IPC: G01R31/28 ,  H04B1/40 ,  H04W4/00 ,  H04W88/06 ,  H04W4/80 ,  H04W24/06

    Abstract: The disclosed systems, devices, and methods may provide for wireless testing of devices and, in particular, wireless testing of semiconductor devices comprising integrated circuits, memory, and logic circuitry that can be present on a wafer. The semiconductor devices can be tested for functional defects by applying one or more test patterns to the semiconductor devices. Further, for devices under test that do not have built-in wireless connectivity (for example, those that do not have a built-in Bluetooth low-energy engine), the disclosure describes systems and methods that the devices under test can use for external wireless connectivity (e.g., an external board having Bluetooth low-energy) on the low-bandwidth interface. In one example embodiment, for high-bandwidth scan testing, wireless connectivity modules (such as those implementing WiFi or WiGig) are described, which can be used to meet the bandwidth requirements of the one or more tests.

    SYSTEMS AND METHODS FOR WIRELESS DEVICE TESTING
    17.
    发明申请
    SYSTEMS AND METHODS FOR WIRELESS DEVICE TESTING 审中-公开

    公开(公告)号：US20180003764A1

    公开(公告)日：2018-01-04

    申请号：US15200997

    申请日：2016-07-01

    Applicant: Intel Corporation

    Inventor： Sankaran M. Menon ,  Rehan M. Sheikh ,  Rolf H. Kuehnis ,  John Michael Peterson ,  Asifur Rahman ,  Abram M. Detofsky ,  Mohsen Fazlian

    IPC: G01R31/28 ,  H04B1/40 ,  H04W4/00 ,  H04W88/06

    CPC classification number: G01R31/2834 ,  H04B1/40 ,  H04W4/80 ,  H04W24/06 ,  H04W88/06

    Abstract: The disclosed systems, devices, and methods may provide for wireless testing of devices and, in particular, wireless testing of semiconductor devices comprising integrated circuits, memory, and logic circuitry that can be present on a wafer. The semiconductor devices can be tested for functional defects by applying one or more test patterns to the semiconductor devices. Further, for devices under test that do not have built-in wireless connectivity (for example, those that do not have a built-in Bluetooth low-energy engine), the disclosure describes systems and methods that the devices under test can use for external wireless connectivity (e.g., an external board having Bluetooth low-energy) on the low-bandwidth interface. In one example embodiment, for high-bandwidth scan testing, wireless connectivity modules (such as those implementing WiFi or WiGig) are described, which can be used to meet the bandwidth requirements of the one or more tests.

    METHOD AND APPARATUS FOR USING TARGET OR UNIT UNDER TEST (UUT) AS DEBUGGER
    19.
    发明申请
    METHOD AND APPARATUS FOR USING TARGET OR UNIT UNDER TEST (UUT) AS DEBUGGER 审中-公开

    公开(公告)号：US20170286254A1

    公开(公告)日：2017-10-05

    申请号：US15085733

    申请日：2016-03-30

    Applicant: Intel Corporation

    Inventor： Sankaran M. Menon ,  Rolf H. Kuehnis ,  William H. Penner ,  Pronay Dutta

    IPC: G06F11/36

    CPC classification number: G06F11/364 ,  G06F11/34 ,  G06F11/366

    Abstract: A method and apparatus for collecting debug and crash information are described. In one embodiment, a system comprises one or more compute engines an external interface; a non-volatile memory coupled to the external interface and operable to store captured information, wherein the captured information comprises one or both of debug information and crash information; a first trace aggregator coupled to the non-volatile memory and the one or more compute engines to capture the one or both of debug information and crash information from at least one of the one or more compute engines in response to a crash of the system; and a controller, coupled to the non-volatile memory and the first trace aggregator, to cause captured information to be sent from the first trace aggregator to the non-volatile memory and to subsequently control transfer of the captured information stored in the non-volatile memory to the external interface.

    INTERFACES FOR WIRELESS DEBUGGING
    20.
    发明申请
    INTERFACES FOR WIRELESS DEBUGGING 有权

    公开(公告)号：US20170176523A1

    公开(公告)日：2017-06-22

    申请号：US14975685

    申请日：2015-12-18

    Applicant: Intel Corporation

    Inventor： Sankaran M. Menon ,  Bradley H. Smith ,  Jinshi Huang ,  Rolf H. Kuehnis

    IPC: G01R31/3177 ,  G01R31/317 ,  H04W4/00

    CPC classification number: G01R31/3177 ,  G01R31/31703 ,  G01R31/31705 ,  G01R31/31722 ,  H04W4/80

    Abstract: Existing multi-wire debugging protocols, such as 4-wire JTAG, 2-wire cJTAG, or ARM SWD, are run through a serial wireless link by providing the debugger and the target device with hardware interfaces that include UARTs and conversion bridges. The debugger interface serializes outgoing control signals and de-serializes returning data. The target interface de-serializes incoming control signals and serializes outgoing data. The actions of the interfaces are transparent to the inner workings of the devices, allowing re-use of existing debugging software. Compression, signal combining, and other optional enhancements increase debugging speed and flexibility while wirelessly accessing target devices that may be too small, too difficult to reach, or too seal-dependent for a wired connection.

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