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公开(公告)号:US20150162241A1
公开(公告)日:2015-06-11
申请号:US14627252
申请日:2015-02-20
Applicant: INVENSAS CORPORATION
Inventor: Cyprian Emeka Uzoh , Charles G. Woychik , Michael Newman , Pezhman Monadgemi , Terrence Caskey
IPC: H01L21/768 , H01L21/3205 , H01L23/532
CPC classification number: H01L21/76877 , H01L21/32055 , H01L21/76802 , H01L21/76841 , H01L21/76858 , H01L21/76873 , H01L21/76874 , H01L21/76898 , H01L23/147 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L23/49866 , H01L23/525 , H01L23/53233 , H01L23/53238 , H01L2224/16 , H01L2924/0002 , H01L2924/00
Abstract: Structures and methods of forming the same are disclosed herein. In one embodiment, a structure can comprise a region having first and second oppositely facing surfaces. A barrier region can overlie the region. An alloy region can overlie the barrier region. The alloy region can include a first metal and one or more elements selected from the group consisting of silicon (Si), germanium (Ge), indium (Id), boron (B), arsenic (As), antimony (Sb), tellurium (Te), or cadmium (Cd).
Abstract translation: 本文公开了其形成的结构和方法。 在一个实施例中,结构可以包括具有第一和第二相对面的表面的区域。 屏障区域可以覆盖该区域。 合金区域可以覆盖阻挡区域。 合金区域可以包括第一金属和选自硅(Si),锗(Ge),铟(Id),硼(B),砷(As),锑(Sb),碲的一种或多种元素 (Te)或镉(Cd)。
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公开(公告)号:US08981564B2
公开(公告)日:2015-03-17
申请号:US13897956
申请日:2013-05-20
Applicant: Invensas Corporation
Inventor: Charles G. Woychik , Cyprian Emeka Uzoh , Michael Newman , Pezhman Monadgemi , Terrence Caskey
IPC: H01L23/48 , H01L21/768
CPC classification number: H01L21/76877 , H01L21/32055 , H01L21/76802 , H01L21/76841 , H01L21/76858 , H01L21/76873 , H01L21/76874 , H01L21/76898 , H01L23/147 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L23/49866 , H01L23/525 , H01L23/53233 , H01L23/53238 , H01L2224/16 , H01L2924/0002 , H01L2924/00
Abstract: Structures and methods of forming the same are disclosed herein. In one embodiment, a structure can comprise a region having first and second oppositely facing surfaces. A barrier region can overlie the region. An alloy region can overlie the barrier region. The alloy region can include a first metal and one or more elements selected from the group consisting of silicon (Si), germanium (Ge), indium (Id), boron (B), arsenic (As), antimony (Sb), tellurium (Te), or cadmium (Cd).
Abstract translation: 本文公开了其形成的结构和方法。 在一个实施例中,结构可以包括具有第一和第二相对面的表面的区域。 屏障区域可以覆盖该区域。 合金区域可以覆盖阻挡区域。 合金区域可以包括第一金属和选自硅(Si),锗(Ge),铟(Id),硼(B),砷(As),锑(Sb),碲的一种或多种元素 (Te)或镉(Cd)。
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公开(公告)号:US10475733B2
公开(公告)日:2019-11-12
申请号:US16156595
申请日:2018-10-10
Applicant: Invensas Corporation
Inventor: Cyprian Emeka Uzoh , Pezhman Monadgemi , Terrence Caskey , Fatima Lina Ayatollahi , Belgacem Haba , Charles G. Woychik , Michael Newman
IPC: H05K1/09 , H05K1/11 , H05K3/38 , H01L21/02 , H01L21/48 , H01L23/52 , H01L23/522 , H01L23/532 , H01L23/498 , H01L21/768 , H01L23/373 , H01L23/367 , H01L23/48 , H01L23/36
Abstract: An interconnect element includes a semiconductor or insulating material layer that has a first thickness and defines a first surface; a thermally conductive layer; a plurality of conductive elements; and a dielectric coating. The thermally conductive layer includes a second thickness of at least 10 microns and defines a second surface of the interconnect element. The plurality of conductive elements extend from the first surface of the interconnect element to the second surface of the interconnect element. The dielectric coating is between at least a portion of each conductive element and the thermally conductive layer.
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公开(公告)号:US10103094B2
公开(公告)日:2018-10-16
申请号:US15626687
申请日:2017-06-19
Applicant: Invensas Corporation
Inventor: Cyprian Emeka Uzoh , Pezhman Monadgemi , Terrence Caskey , Fatima Lina Ayatollahi , Belgacem Haba , Charles G. Woychik , Michael Newman
IPC: H05K1/00 , H01L23/498 , H01L23/48 , H01L23/36 , H01L23/373 , H01L21/768 , H01L23/367
Abstract: An interconnect element includes a semiconductor or insulating material layer that has a first thickness and defines a first surface; a thermally conductive layer; a plurality of conductive elements; and a dielectric coating. The thermally conductive layer includes a second thickness of at least 10 microns and defines a second surface of the interconnect element. The plurality of conductive elements extend from the first surface of the interconnect element to the second surface of the interconnect element. The dielectric coating is between at least a portion of each conductive element and the thermally conductive layer.
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公开(公告)号:US09379008B2
公开(公告)日:2016-06-28
申请号:US14627252
申请日:2015-02-20
Applicant: Invensas Corporation
Inventor: Cyprian Emeka Uzoh , Charles G. Woychik , Michael Newman , Pezhman Monadgemi , Terrence Caskey
IPC: H01L21/768 , H01L23/48 , H01L23/498 , H01L23/532 , H01L21/3205 , H01L23/14 , H01L23/525
CPC classification number: H01L21/76877 , H01L21/32055 , H01L21/76802 , H01L21/76841 , H01L21/76858 , H01L21/76873 , H01L21/76874 , H01L21/76898 , H01L23/147 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L23/49866 , H01L23/525 , H01L23/53233 , H01L23/53238 , H01L2224/16 , H01L2924/0002 , H01L2924/00
Abstract: Structures and methods of forming the same are disclosed herein. In one embodiment, a structure can comprise a region having first and second oppositely facing surfaces. A barrier region can overlie the region. An alloy region can overlie the barrier region. The alloy region can include a first metal and one or more elements selected from the group consisting of silicon (Si), germanium (Ge), indium (Id), boron (B), arsenic (As), antimony (Sb), tellurium (Te), or cadmium (Cd).
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公开(公告)号:US09064933B2
公开(公告)日:2015-06-23
申请号:US13724223
申请日:2012-12-21
Applicant: Invensas Corporation
Inventor: Cyprian Emeka Uzoh , Pezhman Monadgemi , Michael Newman , Charles G. Woychik , Terrence Caskey
IPC: H01L21/4763 , H01L21/768 , H01L21/78 , H01L21/56 , H01L23/48
CPC classification number: H01L21/76898 , H01L21/31053 , H01L21/561 , H01L21/6835 , H01L21/768 , H01L21/76841 , H01L21/76877 , H01L21/78 , H01L23/481 , H01L24/94 , H01L2221/68327 , H01L2221/68381 , H01L2924/0002 , H01L2924/12042 , H01L2924/00
Abstract: Methods of forming a microelectronic assembly and the resulting structures and devices are disclosed herein. In one embodiment, a method of forming a microelectronic assembly includes removing material exposed at portions of a surface of a substrate to form a processed substrate having a plurality of thinned portions separated by integral supporting portions of the processed substrate having a thickness greater than a thickness of the thinned portions, at least some of the thinned portions including a plurality of electrically conductive interconnects extending in a direction of the thicknesses of the thinned portions and exposed at the surface; and removing the supporting portions of the substrate to sever the substrate into a plurality of individual thinned portions, at least some individual thinned portions including the interconnects.
Abstract translation: 本文公开了形成微电子组件的方法以及所得到的结构和装置。 在一个实施例中,形成微电子组件的方法包括去除在衬底的表面的部分处暴露的材料,以形成经处理的衬底,该衬底具有多个由处理衬底的整体支撑部分分隔开的薄化部分,该部分的厚度大于厚度 减薄部分中的至少一些薄化部分包括在薄壁部分的厚度方向上延伸并在表面露出的多个导电互连件; 以及去除衬底的支撑部分以将衬底切割成多个单独的薄化部分,至少一些单独的变薄部分,包括互连。
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公开(公告)号:US10297582B2
公开(公告)日:2019-05-21
申请号:US14952064
申请日:2015-11-25
Applicant: Invensas Corporation
Inventor: Terrence Caskey , Ilyas Mohammed , Cyprian Emeka Uzoh , Charles G. Woychik , Michael Newman , Pezhman Monadgemi , Reynaldo Co , Ellis Chau , Belgacem Haba
IPC: H01L25/10 , H05K1/02 , H05K3/46 , H01L23/498 , H01L21/48 , H01L23/31 , H01L23/00 , H01L25/065
Abstract: A method for making an interposer includes forming a plurality of wire bonds bonded to one or more first surfaces of a first element. A dielectric encapsulation is formed contacting an edge surface of the wire bonds which separates adjacent wire bonds from one another. Further processing comprises removing at least portions of the first element, wherein the interposer has first and second opposite sides separated from one another by at least the encapsulation, and the interposer having first contacts and second contacts at the first and second opposite sides, respectively, for electrical connection with first and second components, respectively, the first contacts being electrically connected with the second contacts through the wire bonds.
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公开(公告)号:US20190139878A1
公开(公告)日:2019-05-09
申请号:US16156595
申请日:2018-10-10
Applicant: Invensas Corporation
Inventor: Cyprian Emeka Uzoh , Pezhman Monadgemi , Terrence Caskey , Fatima Lina Ayatollahi , Belgacem Haba , Charles G. Woychik , Michael Newman
IPC: H01L23/498 , H01L23/367 , H01L23/36 , H01L23/48 , H01L23/373 , H01L21/768
CPC classification number: H01L23/49827 , H01L21/76829 , H01L21/76898 , H01L23/36 , H01L23/367 , H01L23/3677 , H01L23/3736 , H01L23/481 , H01L23/49838 , H01L23/49866 , H01L2924/00 , H01L2924/0002
Abstract: An interconnect element includes a semiconductor or insulating material layer that has a first thickness and defines a first surface; a thermally conductive layer; a plurality of conductive elements; and a dielectric coating. The thermally conductive layer includes a second thickness of at least 10 microns and defines a second surface of the interconnect element. The plurality of conductive elements extend from the first surface of the interconnect element to the second surface of the interconnect element. The dielectric coating is between at least a portion of each conductive element and the thermally conductive layer.
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公开(公告)号:US10181411B2
公开(公告)日:2019-01-15
申请号:US14950180
申请日:2015-11-24
Applicant: Invensas Corporation
Inventor: Michael Newman , Cyprian Uzoh , Charles G. Woychik , Pezhman Monadgemi , Terrence Caskey
Abstract: An insulating second element is provided and overlies a surface of a first element which consists essentially of a material having a CTE of less than 10 ppm/° C. and has a first thickness in a first direction normal to the surface. Openings extend in the first direction through the second element. The first element is abraded to produce a thinned first element having a second thickness less than the first thickness. Conductive elements are formed at a first side of the interposer coincident with or adjacent to a surface of the thinned first element remote from the second element. A conductive structure extends through the openings in the second element, wherein the conductive elements are electrically connected with terminals of the interposer through the conductive structure, and the terminals are disposed at a second side of the interposer opposite from the first side.
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公开(公告)号:US09685401B2
公开(公告)日:2017-06-20
申请号:US14815282
申请日:2015-07-31
Applicant: Invensas Corporation
Inventor: Cyprian Emeka Uzoh , Pezhman Monadgemi , Terrence Caskey , Fatima Lina Ayatollahi , Belgacem Haba , Charles G. Woychik , Michael Newman
IPC: H05K1/00 , H01L23/498 , H01L21/768 , H01L23/373 , H01L23/48 , H01L23/36 , H01L23/367
CPC classification number: H01L23/49827 , H01L21/76829 , H01L21/76898 , H01L23/36 , H01L23/367 , H01L23/3677 , H01L23/3736 , H01L23/481 , H01L23/49838 , H01L23/49866 , H01L2924/00 , H01L2924/0002
Abstract: An interconnect element includes a semiconductor or insulating material layer that has a first thickness and defines a first surface; a thermally conductive layer; a plurality of conductive elements; and a dielectric coating. The thermally conductive layer includes a second thickness of at least 10 microns and defines a second surface of the interconnect element. The plurality of conductive elements extend from the first surface of the interconnect element to the second surface of the interconnect element. The dielectric coating is between at least a portion of each conductive element and the thermally conductive layer.
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